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PDF ( 数据手册 , 数据表 ) X9430

零件编号 X9430
描述 Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier
制造商 Xicor
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X9430 数据手册, 描述, 功能
X9430PPrrDNeoOulgciTN1aom-rORn8la8tEiDRamn8CcE-iOItagCNmoMrOTiuytMEMaraRETMbIlSeNlnEylcIDeLfNhEoCnDoDAirrEocmwDFannlOwRaStaRwrEulto.oNPpiinolpLEgtloAeWenrrCdstDEiClEM.PecSnEooItmNGetTer/NtsanScttiometer (XDCP) with Operational Amplifier
FEATURES
• Two CMOS voltage operational amplifiers
• Two digitally controlled potentiometers
• Can be combined or used separately
• Amplifiers
—Low voltage operation
—V+/V- = ±2.7V to ±5.5V
—Rail-to-rail CMOS performance
—1MHz gain bandwidth product
• Digitally controlled potentiometer
—Dual 64 tap potentiometers
—Rtotal = 10k¾
—SPI serial interface
—VCC = 2.7V to 5.5V
DESCRIPTION
The X9430 is a monolithic CMOS IC that incorporates
two operational amplifiers and two nonvolatile digitally
controlled potentiometers. The amplifiers are CMOS
differential input voltage operational amplifiers with
near rail-to-rail outputs. All pins for the two amplifiers
are brought out of the package to allow combining
them with the potentiometers or using them as com-
plete stand-alone amplifiers.
The digitally controlled potentiometers consist of a
series string of 63 polycrystalline resistors that behave
as standard integrated circuit resistors. The SPI serial
port, common to both pots, allows the user to program
the connection of the wiper output to any of the resistor
nodes in the series string. The wiper position is saved
in the on board E2 memory to allow for nonvolatile res-
toration of the wiper position.
A wide variety of applications can be implemented
using the potentiometers and the amplifiers. A typical appli-
cation is to implement the amplifier as a wiper buffer in
circuits that use the potentiometer as a voltage refer-
ence. The potentiometer can also be combined with
the amplifier yielding a digitally programmable gain
amplifier or programmable current source.
BLOCK DIAGRAM
HOLD
VCC
RW0 RH0 RL0
CS
SCK
SO
SI
A1
A0
Control and
Memory
WCR0
WCR1
WP VSS
RW1 RL1 RH1
V+
VNI0
+
VOUT0
VINV0
VNI1
+
VOUT1
VINV1
V–
REV 1.0 6/20/00
www.xicor.com
Characteristics subject to change without notice. 1 of 21







X9430 pdf, 数据表
X9430 – Preliminary Information
REGISTER DESCRIPTIONS AND MEMORY MAP
Memory Map
WCRO
DR0
DR1
DR2
DR3
WCR1
DR0
DR1
DR2
DR3
Wiper Counter Register (WCR)
0 0 WP5 WP4 WP3 WP2 WP1 WP0
(volatile)
(LSB)
WP0-WP5 identify wiper position.
Data Registers (DR, R0-R3)
Wiper Position or User Data
(Nonvolatile)
Instruction Format
Notes: (1) “A1 ~ A0”: stands for the device addresses sent by the master.
(2) WPx refers to wiper position data in the Wiper Counter Register
(3) “I”: stands for the increment operation, SI held HIGH during active SCK phase (high).
(4) “D”: stands for the decrement operation, SI held LOW during active SCK phase (high).
Read Wiper Counter Register (WCR)
Read the contents of the Wiper Counter Register pointed to by P1-P0
device type device instruction
WCR
wiper position
CS
Falling
Edge
identifier
0101
addresses
0
0
A
1
A
0
opcode
1001
addresses
0
0
0
P
0
(sent by X9430 on SO) CS
W W W W W W Rising
0 0 P P P P P P Edge
543210
Write Wiper Counter Register (WCR)
Write new value to the Wiper Counter Register pointed to by P1-P0
device type device instruction
WCR
CS
Falling
Edge
identifier
0101
addresses
0
0
A
1
A
0
opcode
1010
addresses
0
0
0
P
0
Data Byte
(sent by Host on SI)
CS
W W W W W W Rising
0 0 P P P P P P Edge
543210
Read Data Register (DR)
Read the contents of the Register pointed to by P1-P0 and R1-R0
device type device instruction DR/WCR
CS
Falling
Edge
identifier
0101
addresses
0
0
A
1
A
0
opcode
1011
addresses
R
1
R
0
0
P
0
Data Byte
(sent by X9430 on SO) CS
W W W W W W Rising
0 0 P P P P P P Edge
543210
Write Data Register (DR)
Write new value to the Register pointed to by P1-P0 and R1-R0
device type device instruction DR/WCR
CS
Falling
Edge
identifier
0101
addresses
0
0
A
1
A
0
opcode
1100
addresses
R
1
R
0
0
P
0
Data Byte
(sent by host on SI)
CS
W W W W W W Rising
0 0 P P P P P P Edge
543210
HIGH-VOLTAGE
WRITE CYCLE
REV 1.0 6/20/00
www.xicor.com
Characteristics subject to change without notice. 8 of 21







X9430 equivalent, schematic
X9430 – Preliminary Information
DCP Timing (for Increment/Decrement Instruction)
CS
SCK
VWx
...
tWRID
...
SI ADDR
Inc/Dec
Inc/Dec
...
SO High Impedance
Write Protect and Device Address Pins Timing
CS (Any Instruction)
tWPASU
tWPAH
WP
A0
A1
REV 1.0 6/20/00
www.xicor.com
Characteristics subject to change without notice. 16 of 21










页数 21 页
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