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PDF ( 数据手册 , 数据表 ) X88064PI

零件编号 X88064PI
描述 E2 Micro-Peripheral
制造商 Xicor
LOGO Xicor LOGO 


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X88064PI 数据手册, 描述, 功能
APPLICATION NOTE
A V A I LABLE
Application Brief
iAPX88/188, MCS 196, MCS51 Compatible*
64K
X88064
8192 x 8 Bit
E2 Microcontroller Peripheral
• Block Lock Write Control
—Eight 1K Byte Blocks
- Lockable Independently or in Combination
• Multiplexed Address/Data Bus
—Direct Interface to Popular Microcontrollers
• High Performance CMOS
—Fast Access Times, 60ns and 80 ns
—Low Power
- 30mA Active Maximum
- 150µA Standby Maximum
• Software Data Protection
• Toggle Bit Polling
—Early End of Write Detection
• Page Mode Write
—Allows up to 32 Bytes to be Written in
One Write Cycle
DESCRIPTION
The X88064 is a high speed byte wide microperipheral
device with eight 1K byte blocks of E2PROM and can be
directly connected to industry standard high performance
microprocessors. This peripheral provides two levels of
memory write control, the standard Software Data Pro-
gram (SDP) control and Block Lock.
Block Lock provides a higher level of memory write con-
trol above SDP. This allows the software developer to
partition any or all of the eight 1K byte blocks as In-Circuit
Programmable ROM (ICPROM). Once locked, a block of
memory must first be unlocked before being written. Not
even a write operation using the SDP sequence will
change the contents of a locked block. Since a distinct, 6
byte, software command sequence locks and unlocks
the memory, the software developer has complete con-
trol of the memory contents.
ALE
A/D0–A/D7
A8–A12
L
A
T
C
H
WR
RD
PSEN
CE
WC
INTERFACE
CONTROL
BLOCK LOCK
CONTROL
LOGIC
D
E
C
O
D
E
R
INDIVIDUALLY LOCKABLE
E2 PROM
ARRAY
1Kx8 BLOCKS
SOFTWARE DATA PROTECT
(SDP)
WE
OE BUS TRANSCEIVER
POWER-ON RESET
AND VCC SENSE
A/D0–A/D7
©Xicor, Inc. 1994, 1995, 1996 Patents Pending
* All other brand and product names may be trademarks or
registered trademarks of their respective companies.
7023-2.3 1/29/97 T0/C2/D0 SH
1
Characteristics subject to change without notice







X88064PI pdf, 数据表
X88064
Block Lock Write Control
The X88064 provides a secondary level of data security
referred to as Block Lock Control. This is accessed
through an extension of the SDP command sequence.
Block Lock allows the user to inhibit writes to any 1K x 8
blocks of memory. Unlike SDP which prevents inadvert-
ent writes, but still allows easy system access to writing
the memory, Block Lock will inhibit all attempts unless it is
specifically disabled by the host. This could be used to
set a higher level of protection in a system where a por-
tion of the memory is used for Program Storage and
another portion is used as Data Storage.
Setting write lockout is accomplished by writing a five-
byte command sequence, opening access to the Block
Lock Register (BLR). After the fifth byte is written, the
user writes to the BLR, selecting which blocks to protect
or unprotect. All write operations, both the command
sequence and writing the data to the BLR, must conform
to the page write timing requirements.
Block Lock Register Format
MSB
LSB
7 65 43 2 1 0
1 = Locked, 0 = Unlocked
BLOCK
ADDRESS
0000–03FF
0400–07FF
0800–0BFF
0C00–0FFF
1000–13FF
1400–17FF
1800–1BFF
1C00–1FFF
7023 FRM F07
Setting Block Lock Register Sequence
WRITE AA
TO 555
WRITE 55
TO AAA
WRITE A0
TO 555
WRITE AA
TO 555
WRITE C0
TO AAA
WRITE BLR
MASK VALUE TO
XXXX
WAIT tWC
(BLR SET)
EXIT ROUTINE
7023 FRM F08
8














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