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PDF ( 数据手册 , 数据表 ) Z9972

零件编号 Z9972
描述 3.3V/ 125-MHz/ Multi-Output Zero Delay Buffer
制造商 Cypress Semiconductor
LOGO Cypress Semiconductor LOGO 


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Z9972 数据手册, 描述, 功能
Z9972
3.3V, 125-MHz, Multi-Output Zero Delay Buffer
Features
• Output frequency up to 125 MHz
• 12 clock outputs: frequency configurable
• 350 ps max output-to-output skew
• Configurable output disable
• Two reference clock inputs for dynamic toggling
• Oscillator or crystal reference input
• Spread Spectrum-compatible
• Glitch-free output clocks transitioning
• 3.3V power supply
• Pin-compatible with MPC972
• Industrial temperature range: –40°C to +85°C
• 52-pin TQFP package
Table 1. Frequency Table[1]
VCO_SEL FB_SEL2 FB_SEL1 FB_SEL0
0000
0001
FVCO
8x
12x
0 0 1 0 16x
0 0 1 1 20x
0 1 0 0 16x
0 1 0 1 24x
0 1 1 0 32x
0 1 1 1 40x
1 0 0 0 4x
1 0 0 1 6x
1 0 1 0 8x
1 0 1 1 10x
1 1 0 0 8x
1 1 0 1 12x
1 1 1 0 16x
1 1 1 1 20x
Note:
1. x = the reference input frequency, 200 MHz < FVCO < 480 MHz.
Block Diagram
XIN
XOUT
VCO_SEL
PLL_EN
REF_SEL
TCLK0
TCLK1
TCLK_SEL
FB_IN
0
1
Phase
Detector
VCO
LPF
0
1
FB_SEL2
DQ
Sync
Frz
DQ
Sync
Frz
MR#/OE
Power-On
Reset
SELA(0,1)
2
SELB(0,1)
SELC(0,1)
2
2
FB_SEL(0,1)
2
/4, /6, /8, /12
/4, /6, /8, /10
/2, /4, /6, /8
/4, /6, /8, /10
Sync Pulse
Data Generator
0
/2 1
SCLK
SDATA
Output Disable
Circuitry
12
INV_CLK
DQ
Sync
Frz
DQ
Sync
Frz
DQ
Sync
Frz
DQ
Sync
Frz
Pin Configuration
QA0
QA1
QA2
QA3
QB0
QB1
QB2
QB3
QC0
QC1
QC2
QC3
FB_OUT
SYNC
VSS
MR#/OE
SCLK
SDATA
FB_SEL2
PLL_EN
REF_SEL
TCLK_SEL
TCLK0
TCLK1
XIN
XOUT
VDD
52 51 50 49 48 47 46 45 44 43 42 41 40
1 39
2 38
3 37
4 36
5 35
6 34
7 Z9972 33
8 32
9 31
10 30
11 29
12 28
13 27
14 15 16 17 18 19 20 21 22 23 24 25 26
VSS
QB0
VDDC
QB1
VSS
QB2
VDDC
QB3
FB_IN
VSS
FB_OUT
VDDC
FB_SEL0
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07088 Rev. *D
Revised December 21, 2002







Z9972 pdf, 数据表
Z9972
Ordering Information
Part Number
IMIZ9972BA
IMIZ9972BAT
Package Type
52-pin TQFP
52-pin TQFP - Tape and Reel
Production Flow
Industrial, 40°C to +85°C
Industrial, 40°C to +85°C
Package Drawing and Dimensions
52-lead Thin Plastic Quad Flat Pack (10 × 10 × 1.4 mm) A52
51-85131-**
All product and company names mentioned in this document are the trademarks of their respective holders.
Document #: 38-07088 Rev. *D
Page 8 of 9
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.














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