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PDF ( 数据手册 , 数据表 ) Z90104

零件编号 Z90104
描述 40-Pin Low-Cost Digital Television Controller
制造商 Zilog.
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Z90104 数据手册, 描述, 功能
PRODUCT SPECIFICATION
1
Z90102/103/104
40-PIN LOW-COST DIGITAL
TELEVISION CONTROLLER
1
FEATURES
8-Bit CMOS Microcontroller for Consumer
Television, Cable and Satellite Receiver Ap-
plications.
Device
ROM
(KB)
Z90102
Z90103
Z90104
4
6
8
Note: *General-Purpose
RAM*
(Bytes)
236
236
236
I/O
24
24
24
s Lowest Cost DTC Family Member
s Low Power Consumption
s Fast Instruction Pointer - 1.5 ms @ 4 MHz
s Two Standby Modes - STOP and HALT
s Low Voltage Detection/Voltage Sensitive Reset
s Port 2 (8-Bit Programmable I/O) and Port 3 (2-Bit Input,
3-Bit Output) Register Mapped Ports
s Port 6 (6-Bit Input and Tristate Comparator AFC Input)
Memory Mapped I/O Ports
s All Digital CMOS Levels Schmitt-Triggered
s Two Programmable 8-Bit Counter/Timers each with 6-
Bit Programmable Prescaler.
s Six Vectored, Priority Interrupts from Six Different
Sources
s Clock Speed up to 4 MHz
s On-Chip Oscillator that Accepts a Crystal, Ceramic
Resonator, LC or External Clock Drive
s Permanently Enabled
Watch-Dog/Power-On Reset Timer
s 3K x 6-Bit Character Generator ROM
s 120 x 7-Bit Video RAM
s Mask Programmable 96-Character Set Display. The
90102 and 90103 6-Row x 20 Column Format, 12x15
Pixel Character Cell. The 90104 8-Row x 20 Column
Format 12x15 Pixel Character Cell. The 90102, 90103
90104 Capable of supporting English, Korean, Thai,
Chinese and Japanese High Resolution Characters.
s Fully Programmable Color Attributes Including Row
Character, Row Background/Fringes, Frame
Background/Position, Bar Graph Color Change, and
Character Size.
s Programmable Display Position and Character Size
Control
s One Pulse Width Modulator (14-Bit Resolution) for
Voltage Synthesis Tuner Control.
s Three Pulse Width Modulator (8-Bit Resolution) for
Picture Control
s Three Pulse Width Modulators (6-Bit Resolution) for
Audio Control
GENERAL DESCRIPTION
The Z90102/3/4 40-pin Low-Cost Digital Television Con-
troller are members of the Z8®STOP Mode MCU single-
chip family with 4, 6, and 8 KB of ROM and 236 bytes of
RAM. The device is offered in a 40-pin package and is
CMOS compatible. The DTC offers mask programmed
ROM which enables the Z8® MCU to be used in a high vol-
ume production application device embedded with a cus-
tom program (customer supplied program) and combines
DS97TEL1902
1







Z90104 pdf, 数据表
Z90102/90103/90104
40-Pin Low-Cost Digital Television Controller
CAPACITANCE
TA = 25°C; VCC = GND = 0V; Freq =1.0 MHz; unmeasured pins to GND.
Parameter
Input capacitance
Output
capacitance
I/O capacitance
AFCIN input
capacitance
Max
10
20
25
10
Units
pF
pF
pF
pF
Zilog
DC CHARACTERISTICS
TA = 0°C to +70°C; VCC = +4.5V to +5.5V; FOSC = 4 MHz
Sym
VIL
VILC
Parameter
Input Voltage Low
Input XTAL/Osc In Low
TA = 0°C to +70°C
Min Max
0 0.2 VCC
0.07 VCC
VIH
VIHC
Input Voltage High
Input XTAL/Osc In High
0.7 VCC
0.8 VCC
VCC
VCC
VHY Schmitt Hysteresis
VPU Maximum Pull-Up
Voltage
VOL Output Voltage Low
0.1 VCC
13.2
0.4
0.4
V00-01
V01-11
VOH
IIR
IIL
IOL
ICC
ICC1
ICC2
AFC Level 01 In
AFC Level 11 In
Output Voltage High
Reset Input Current
Input Leakage
Tristate Leakage
Supply Current
0.5 VCC
VCC –0.4
–3.0
–3.0
0.45 VCC
0.75 VCC
–80
3.0
3.0
20
6
10
Notes:
1. PWM open-drain
2. Recommended operating voltage 12V with maximum positive
tolerance 10%, i.e., 13.2V.
Typical
@ 25°C
1.48
0.98
3.0
3.2
0.8
0.16
0.19
1.9
3.12
4.75
–46
0.01
0.02
13.2
3.2
2.0
Units
V
V
V
V
V
V
Conditions
External Clock
Generator Driven
External Clock
Generator Driven
1, 2
V IOL=1.00 mA
V IOL=0.75 mA 1
V
V
V IOH=–0.75 mA
mA VRL=0V
mA 0V, VCC
mA 0V, VCC
mA All inputs at rail &
mA outputs floating
mA
8 DS97TEL1902







Z90104 equivalent, schematic
Z90102/90103/90104
40-Pin Low-Cost Digital Television Controller
FUNCTIONAL DESCRIPTION (Continued)
Hex
Address
Must be 00H
at each pattern
00 0 0 0 0 0 0
01 0 0 0 0 0 0
02 0 1 1 0 0 0
03 1 1 1 0 0 0
04 0 0 1 0 0 0
05 0 0 1 0 0 0
06 0 1 0 1 0 0
07 0 0 1 0 0 0
08 1 0 0 0 1 0
09 0 1 1 0 0 0
0A 1 0 0 0 1 0
0B 0 0 1 0 0 0
0C 0 0 0 0 0 0
0D 0 0 1 0 0 0
0E 1 1 1 1 1 0
0F 1 1 1 1 1 0
10 0 0 1 0 0 0
11 0 0 1 0 0 0
12 0 0 1 0 0 0
13 1 0 1 0 1 0
14 1 1 1 1 1 0
15 1 0 1 0 1 0
16 0 0 1 0 0 0
17 1 0 1 0 1 0
18 1 0 1 0 1 0
19 0 1 1 1 0 0
1A 0 1 1 1 0 0
1B 1 0 1 0 1 0
1C 0 0 1 0 0 0
1D 1 0 1 0 1 0
1E 1 1 1 1 1 0
1F 1 0 1 0 1 0
20
¯
High Resolution
3F Character Pattern
FC0
¯ High Resolution
FDF Character Pattern
FE0
¯
High Resolution
FFF Character Pattern
MSB
LSB
(6 Bits Wide)
Left Half
Right Half
Figure 13. High Resolution Character ROM Configuration
16
Zilog
DS97TEL1902










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