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PDF ( 数据手册 , 数据表 ) XR-2212CP

零件编号 XR-2212CP
描述 Precision Phase-Locked Loop
制造商 Exar Corporation
LOGO Exar Corporation LOGO 


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XR-2212CP 数据手册, 描述, 功能
...the analog plus companyTM
XR-2212
Precision
Phase-Locked Loop
FEATURES
D Quadrature VCO Outputs
D Wide Frequency Range (0.01Hz to 300kHz)
D Wide Supply Voltage Range (4.5V to 20V)
D TTL/HCMOS Compatible (VCC = 5VDC)
D Wide Dynamic Range (2mV to 3Vrms)
D Adjustable Tracking Range ("1% to "80%)
D Excellent Temp. Stability 20ppm/°C, Typ.
APPLICATIONS
D Frequency Synthesis
D Data Synchronization
D FM Detection
D Tracking Filters
D FSK Demodulation
June 1997-3
GENERAL DESCRIPTION
The XR-2212 is an ultra-stable monolithic phase-locked
loop (PLL) system especially designed for data
communications and control system applications. Its on
board reference and uncommitted operational amplifier,
together with a typical temperature stability of better than
20ppm/°C, make it ideally suited for frequency synthesis,
FM detection, and tracking filter applications. The wide
input dynamic range, large operating voltage range, large
frequency range, and HCMOS and TTL compatibility
contribute to the usefulness and wide applicability of this
device.
ORDERING INFORMATION
Part No.
XR-2212M
XR-2212CP
XR-2212P
Package
16 Lead 300 Mil CDIP
16 Lead 300 Mil PDIP
16 Lead 300 Mil PDIP
Operating
Temperature Range
-55°C to +125°C
0°C to +70°C
-40°C to +85°C
BLOCK DIAGRAM
INP 2
0-DET I 16
TIM C1 14
TIM C2 13
TIM R 12
PINP 9
NINP 7
Pre Amplifier
Phase
Detector
VCC
1
VCO
VREF
Amp
GND
4
10 0-DET O
15 VCOQO
3 VCOOC
5 VCOOV
11 VREF
Op Amp
Figure 1. XR-2212 Block Diagram
8 OUT
6 COMP
Rev. 2.01
E1979
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017
1







XR-2212CP pdf, 数据表
XR-2212
+1.0
R0=10K
1M
+0.5
R0=50K
0
R0=500K
500K
50K
-0.5
R0=1M
-1.0
-50
-25
0
VCC=12V
R1=12R0
f0=1kHz
25 50 75
Temperature (C)
10K
100 125
Figure 9. Typical Center Frequency Drift vs. Temperature
DESCRIPTION OF CIRCUIT CONTROLS
Signal Input (Pin 2): Signal is AC coupled to this terminal.
The internal impedance at Pin 2 is 20kW. Recommended
input signal level is in the range of 10mV to 5V
peak-to-peak.
VCO Current Output (Pin 3): This is a high impedance
(MW) current output terminal which can provide +100mA
drive capability with a voltage swing equal to VCC. This
output can directly interface with CMOS or NMOS logic
families.
VCO Voltage Output (Pin 5): This terminal provides a
low- impedance ( 50W) buffered output for the VCO. It
can directly interface with low-power Schottley TTL. For
interfacing with standard TTL circuits, a 750W pull-down
resistor from Pin 5 to ground is required. For operation of
the PLL without an external divider, Pin 5 can be DC
coupled to Pin 16.
Op Amp Compensation (Pin 6): The op amp section is
frequency compensated by connecting an external
capacitor from Pin 6 to the amplifier output (Pin 8). For
unity-gain compensation a 20pF capacitor is
recommended.
Op Amp Inputs (Pins 7 and 9): These are the inverting
and the non-inverting inputs for the op amp section. The
common-mode range of the op amp inputs is from +1V to
(VCC - 1.5) volts.
Op Amp Output (Pin 8): The op amp output is an open-
collector type gain stage and requires a pull-up resistor,
RL, to VCC for proper operation. For most applications, the
recommended value of RL is in 5kW to 10kW range.
Phase Detector Output (Pin 10): This terminal provides
a high-impedance output for the loop phase-detector. The
PLL loop filter is formed by R1 and C1 connected to Pin 10
(see Figure 3). With no input signal, or with no
phase-error within the PLL, the DC level at Pin 10 is very
nearly equal to VREF. The peak voltage swing available at
the phase detector output is equal to $VREF.
Reference Voltage, VREF (Pin 11): This pin is internally
biased at the reference voltage level. VREF:VREF = VCC/2
- 650mV. The DC voltage level at this pin forms an internal
reference for the voltage levels at Pins 10, 12 and 16. Pin
1 must be bypassed to ground with a 0.1mF capacitor, for
proper operation of the circuit.
VCO Control Input (Pin 12): VCO free-running
frequencies determined by external timing resistor, R0,
connected from this terminal to ground. For optimum
temperature stability, R0 must be in the range of 10KW to
100kW (see Figure 9).
VCO Frequency Adjustment: VCO can be fine-tuned
by connecting a potentiometer, RX, in series with R0 at Pin
12 (see Figure 11).
This terminal is a low-impedance point, and is internally
biased at a DC level equal to VREF. The maximum timing
Rev. 2.01
8







XR-2212CP equivalent, schematic
XR-2212
16 LEAD PLASTIC DUAL-IN-LINE
(300 MIL PDIP)
Rev. 1.00
16 9
E1
18
Seating
Plane
A
L
B
D
A2
A1
e B1
E
C
α
eA
eB
Rev. 2.01
SYMBOL
INCHES
MIN MAX
MILLIMETERS
MIN MAX
A
0.145 0.210
3.68 5.33
A1
0.015 0.070
0.38 1.78
A2
0.115 0.195
2.92 4.95
B
0.014 0.024
0.36 0.56
B1
0.030 0.070
0.76 1.78
C
0.008 0.014
0.20 0.38
D
0.745 0.840
18.92 21.34
E
0.300 0.325
7.62 8.26
E1
0.240 0.280
6.10 7.11
e
0.100 BSC
2.54 BSC
eA
0.300 BSC
7.62 BSC
eB
0.310 0.430
7.87 10.92
L
0.115 0.160
2.92 4.06
α
0° 15°
0° 15°
Note: The control dimension is the inch column
16










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