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PDF ( 数据手册 , 数据表 ) XR-215ACD

零件编号 XR-215ACD
描述 Monolithic PhaseLocked Loop
制造商 Exar Corporation
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XR-215ACD 数据手册, 描述, 功能
...the analog plus companyTM
XR-215A
Monolithic
Phase–Locked Loop
FEATURES
D Wide Frequency Range: 0.5Hz to 25MHz
D Wide Supply Voltage Range: 5V to 26V
D Wide Dynamic Range: 300mV to 3V, nominally
D ON-OFF Keying and Sweep Capability
D Wide Tracking Range: Adjustable from +1% to
+50%
D High-Quality FM Detection: Distortion 0.15%
Signal/Noise 65dB
APPLICATIONS
D FM Demodulation
D Frequency Synthesis
D FSK Coding/Decoding (MODEM)
D Tracking Filters
D Signal Conditioning
D Tone Decoding
D Data Synchronization
D Telemetry Coding/Decoding
D FM, FSK and Sweep Generation
D Crystal-Controlled PLL
D Wideband Frequency Discrimination
D Voltage-to-Frequency Conversion
June 1997-3
GENERAL DESCRIPTION
The XR-215A is a highly versatile monolithic phase-
locked loop (PLL) system designed for a wide variety of
applications in both analog and digital communication
systems. It is especially well suited for FM or FSK
demodulation, frequency synthesis and tracking filter
applications. The XR-215A can operate over a large
choice of power supply voltages ranging from 5V to 26V
and a wide frequency band of 0.5Hz to 25MHz. It can
accommodate analog signals between 300mV and 3V.
ORDERING INFORMATION
Part No.
XR-215ACP
XR-215ACD
Package
16 Lead 300 Mil PDIP
16 Lead SOIC (Jedec, 0.300”)
Operating Temperature
Range
0°C to 70°C
0°C to 70°C
Rev. 1.01
E1996
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z (510) 668-7010
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XR-215ACD pdf, 数据表
XR-215A
Signal
Input
50W
+6V
0.1mF
2K
0.1mF
0.1mF
2K
750
U1
5
6 Phase
Comp.
5K 11
16 VCC
4
XR-215A
12
S4 10
VEE
9
VCO
13 14
100pF
15
Op 8
Amp
2 31
7
300pF
-6V
RP 10K
2nF 2nF
2K
0.1mF
VCO
Output
10K
-6V
10K
RF
100K
Demodulated
Output
0.068mF
50 50
Figure 4. Test Circuit for Split-Supply Operation
Rev. 1.01
8







XR-215ACD equivalent, schematic
XR-215A
Amplifier Output (Pin 8)
This pin is used as the output terminal for FM or FSK
demodulation. The amplifier gain is determined by the
external feedback resistor, RF, connected between pins 1
and 8. Frequency response characteristics of the
amplifier section are shown in Figure 11.
Amplifier Compensation (Pin 7)
The operational amplifier can be compensated for unity
gain by a single 300pF capacitor from pin 7 to ground.
(See Figure 11.)
BASIC PHASE-LOCKED LOOP OPERATION
applied to the control terminal of the VCO. If the input
frequency, fs, is sufficiently close to fo, the feedback
nature of the PLL causes the VCO to synchronize or “lock”
with the incoming signal. Once in lock, the VCO frequency
is identical to the input signal, except for a finite phase
difference.
A Linearized Model for PLL
When the PLL is in lock, it can be approximated by the
linear feedback system shown in Figure 14. Os and Oo are
the respective phase angles associated with the input
signal and the VCO output, F(s) is the low-pass filter
response in frequency domain, and Kd and Ko are the
conversion gains associated with the phase comparator
and VCO sections of the PLL.
Principle of Operation
The phase-locked loop (PLL) is a unique and versatile
circuit technique which provides frequency selective
tuning and filtering without the need for coils or inductors.
As shown in Figure 13, the PLL is a feedback system
comprised of three basic functional blocks: phase
comparator, low-pass filter and voltage-controlled
oscillator (VCO). The basic principle of operation of a PLL
can be briefly explained as follows: with no input signal
applied to the system, the error voltage Vd, is equal to
zero. The VCO operates at a set frequency, fo, which is
known as the “free-running” frequency. If an input signal is
applied to the system, the phase comparator compares
the phase and frequency of the input signal with the VCO
frequency and generates an error voltage, Ve(t), that is
related to the phase and frequency difference between
the two signals. This error voltage is then filtered and
DEFINITION OF XR-215A PARAMETERS USED FOR
PLL APPLICATIONS DESIGN
VCO Free-Running Frequency, fo
The VCO frequency with no input signal is determined by
selection of C0 across pins 13 and 14 and can be
increased by connecting an external resistor RX between
pins 9 and 10. It can be approximated as:
ǒ Ǔf0
[
220
C0
1
)
0.6
RX
where C0 is in mF and RX is in kW. (See Figure 8.)
Input
Signal
VS(t)
fs
Phase
Ve(t)
Comparator
VO(t)
Lowpass
Filter
Vd(t)
VCO
fo
Vd(t)
Figure 13. Block Diagram of a Phase-Locked Loop
Rev. 1.01
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