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PDF ( 数据手册 , 数据表 ) K9F2808U0B-Y

零件编号 K9F2808U0B-Y
描述 16M x 8 Bit NAND Flash Memory
制造商 Samsung semiconductor
LOGO Samsung semiconductor LOGO 


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K9F2808U0B-Y 数据手册, 描述, 功能
K9F2808Q0B-DCB0,DIB0 K9F2808U0B-YCB0,YIB0
K9F2808U0B-VCB0,VIB0 K9F2808U0B-DCB0,DIB0
Document Title
16M x 8 Bit NAND Flash Memory
FLASH MEMORY
Revision History
Revision No. History
0.0 Initial issue.
Draft Date
May 28’th 2001
0.1 K9F2808U0B(3.3V device)’s qualification is finished
Jun. 30th 2001
0.2 K9F2808Q0B (1.8V device)
- Changed typical read operation current (Icc1) from 8mA to 5mA
Jul. 30th 2001
- Changed typical program operation current (Icc2) from 8mA to 5mA
- Changed typical erase operation current (Icc3) from 8mA to 5mA
- Changed typical program time(tPROG) from 200us to 300us
- Changed ALE to RE Delay (ID read, tAR1) from 100ns to 20ns
- Changed CLE hold time(tCLH) from 10ns to 15ns
- Changed CE hold time(tCH) from 10ns to 15ns
- Changed ALE hold time(tALH) from 10ns to 15ns
- Changed Data hold time(tDH) from 10ns to 15ns
- Changed CE Access time(tCEA) from 45ns to 60ns
- Changed Read cycle time(tRC) from 50ns to 70ns
- Changed Write Cycle time(tWC) from 50ns to 70ns
- Changed RE Access time(tREA) from 35ns to 40ns
- Changed RE High Hold time(tREH) from 15ns to 20ns
- Changed WE High Hold time(tWH) from 15ns to 20ns
0.3 1. Device Code is changed
- TBGA package information : ’B’ --> ’D’
ex) K9F2808Q0B-BCB0 ,BIB0 --> K9F2808Q0B-DCB0,DIB0
K9F2808U0B-BCB0 ,BIB0 --> K9F2808Q0B-DCB0,DIB0
2. VIH ,VIL of K9F2808Q0B(1.8 device) is changed
Aug. 23th 2001
(before revision)
Input High Voltage
I/O pins
VccQ-0.4
VIH
Except I/O pins VCC-0.4
-
VccQ
VCC
Input Low Voltage,
All inputs
V IL
-
0 - 0.4
(after revision)
Input High Voltage
I/O pins
VccQ-0.4
VIH
Except I/O pins VCC-0.4
-
Input Low Voltage,
All inputs
V IL
-
-0.3 -
VccQ
+0.3
VCC
+0.3
0.4
Remark
Advance
K9F2808Q0B
: Preliminary
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
1







K9F2808U0B-Y pdf, 数据表
K9F2808Q0B-DCB0,DIB0 K9F2808U0B-YCB0,YIB0
K9F2808U0B-VCB0,VIB0 K9F2808U0B-DCB0,DIB0
FLASH MEMORY
Figure 1. FUNCTIONAL BLOCK DIAGRAM
VCC
VSS
A9 - A 23
A0 - A7
X-Buffers
Latches
& Decoders
Y-Buffers
Latches
& Decoders
Command
A8
Command
Register
CE Control Logic
RE & High Voltage
WE Generator
128M + 4M Bit
NAND Flash
ARRAY
(512 + 16)Byte x 32768
Page Register & S/A
Y-Gating
I/O Buffers & Latches
Vcc/V CCQ
VSS
Global Buffers
Output
Driver
I/0 0
I/0 7
CLE ALE WP
Figure 2. ARRAY ORGANIZATION
1 Block =32 Pages
= (16K + 512) Byte
32K Pages
(=1,024 Blocks)
1st half Page Register
(=256 Bytes)
2nd half Page Register
(=256 Bytes)
512B Byte
16 Byte
1 Page = 528 Byte
1 Block = 528 Bytes x 32 Pages
= (16K + 512) Byte
1 Device = 528Byte x 32Pages x 1024 Blocks
= 132 Mbits
8 bit
Page Register
512 Byte
16 Byte
I/O 0 ~ I/O 7
I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6
1st Cycle
A0
A1
A2
A3
A4
A5
A6
2nd Cycle A9
A10 A11 A12
A13 A14 A15
3rd Cycle A17 A18 A19 A20 A21 A22 A23
NOTE : Column Address : Starting Address of the Register.
00h Command(Read) : Defines the starting address of the 1st half of the register.
01h Command(Read) : Defines the starting address of the 2nd half of the register.
* A 8 is set to "Low" or "High" by the 00h or 01h Command.
* L must be set to "Low".
* The device ignores any additional input of address cycles than reguired.
I/O 7
A7
A16
*L
Column Address
Row Address
(Page Address)
8







K9F2808U0B-Y equivalent, schematic
K9F2808Q0B-DCB0,DIB0 K9F2808U0B-YCB0,YIB0
K9F2808U0B-VCB0,VIB0 K9F2808U0B-DCB0,DIB0
FLASH MEMORY
Pointer Operation of K9F2808X0B
Samsung NAND Flash has three address pointer commands as a substitute for the two most significant column addresses. ’00h’
command sets the pointer to ’A’ area(0~255byte), ’01h’ command sets the pointer to ’B’ area(256~511byte), and ’50h’ command sets
the pointer to ’C’ area(512~527byte). With these commands, starting column address can be set to somewhere of a whole
page(0~527byte). ’00h’ or ’50h’ is sustained until another address pointer command is entered. But, ’01h’ command is effective only
for one time operation. After any operation of Read, Program, Erase, Reset, Power_Up following ’01h’ command, the address
pointer returns to ’A’ area by itself. To program data starting from ’A’ or ’C’ area, ’00h’ or ’50h’ command must be entered before ’80h’
command is written. A complete read operation prior to ’80h’ command is not necessary. To program data starting from ’B’ area,
’01h’ command must be entered right before ’80h’ command is written.
Table 2. Destination of the pointer
Command
00h
01h
50h
Pointer position
0 ~ 255 byte
256 ~ 511 byte
512 ~ 527 byte
Area
1st half array(A)
2nd half array(B)
spare array(C)
"A" area
(00h plane)
"B" area
"C" area
(01h plane) (50h plane)
256 Byte
256 Byte
16 Byte
"A" "B" "C"
Internal
Page Register
Pointer select
commnad
(00h, 01h, 50h)
Pointer
Figure 4. Block Diagram of Pointer Operation
(1) Command input sequence for programming ’A’ area
The address pointer is set to ’A’ area(0~255), and sustained
Address / Data input
00h 80h
10h 00h
Address / Data input
80h 10h
’A’,’B’,’C’ area can be programmed.
It depends on how many data are inputted.
’00h’ command can be omitted.
(2) Command input sequence for programming ’B’ area
The address pointer is set to ’B’ area(256~512), and will be reset to
’A’ area after every program operation is executed.
Address / Data input
Address / Data input
01h 80h
10h 01h
80h
10h
’B’, ’C’ area can be programmed.
It depends on how many data are inputted.
’01h’ command must be rewritten before
every program operation
(3) Command input sequence for programming ’C’ area
The address pointer is set to ’C’ area(512~527), and sustained
Address / Data input
50h 80h
10h 50h
Address / Data input
80h 10h
Only ’C’ area can be programmed.
’50h’ command can be omitted.
16










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