DataSheet8.cn


PDF ( 数据手册 , 数据表 ) K7A403601B-QC

零件编号 K7A403601B-QC
描述 128Kx36/x32 & 256Kx18 Synchronous SRAM
制造商 Samsung semiconductor
LOGO Samsung semiconductor LOGO 


1 Page

No Preview Available !

K7A403601B-QC 数据手册, 描述, 功能
K7A403600B
K7A403200B
K7A401800B
128Kx36/x32 & 256Kx18 Synchronous SRAM
Document Title
128Kx36 & 128Kx32 & 256Kx18-Bit Synchronous Pipelined Burst SRAM
Revision History
Rev. No History
0.0 1. Initial draft
0.1 1. Changed DC parameters
Icc ; from 350mA to 290mA at -16,
from 330mA to 270mA at -15,
from 300mA to 250mA at -14,
ISB1 ; from 100mA to 80mA
0.2 1. Delete Pass-Through
0.3 1. Add x32 org. and industrial temperature
1.0 1. Final spec release
2. Changed Pin Capacitance
- Cin ; from 5pF to 4pF
- Cout ; from 7pF to 6pF
Draft Date
May. 15. 2001
June. 12. 2001
Remark
Preliminary
Preliminary
June.25. 2001
Aug. 11. 2001
Nov. 15. 2001
Preliminary
Preliminary
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
- 1 - Nov 2001
Rev 1.0







K7A403601B-QC pdf, 数据表
K7A403600B
K7A403200B
K7A401800B
128Kx36/x32 & 256Kx18 Synchronous SRAM
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
SYMBOL
RATING
UNIT
Voltage on VDD Supply Relative to VSS
Voltage on VDDQ Supply Relative to VSS
VDD
VDDQ
-0.3 to 4.6
VDD
V
V
Voltage on Input Pin Relative to VSS
VIN
-0.3 to VDD+0.3
V
Voltage on I/O Pin Relative to VSS
VIO
-0.3 to VDDQ+0.3
V
Power Dissipation
PD 2.2 W
Storage Temperature
TSTG
-65 to 150
°C
Operating Temperature
Commercial
Industrial
TOPR
TOPR
0 to 70
-40 to 85
°C
°C
Storage Temperature Range Under Bias
TBIAS
-10 to 85
°C
*Note : Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
OPERATING CONDITIONS at 3.3V I/O (0°CTA70°C)
PARAMETER
SYMBOL
MIN
Supply Voltage
VDD
VDDQ
3.135
3.135
Ground
VSS 0
* The above parameters are also guaranteed at industrial temperature range.
Typ.
3.3
3.3
0
OPERATING CONDITIONS at 2.5V I/O(0°C TA 70°C)
PARAMETER
Supply Voltage
Ground
SYMBOL
VDD
VDDQ
VSS
MIN
3.135
2.375
0
* The above parameters are also guaranteed at industrial temperature range.
Typ.
3.3
2.5
0
CAPACITANCE*(TA=25°C, f=1MHz)
PARAMETER
Input Capacitance
Output Capacitance
SYMBOL
CIN
COUT
*Note : Sampled not 100% tested.
TEST CONDITION
VIN=0V
VOUT=0V
MIN
-
-
MAX
3.6
3.6
0
MAX
3.6
2.9
0
MAX
4
6
UNIT
V
V
V
UNIT
V
V
V
UNIT
pF
pF
- 8 - Nov 2001
Rev 1.0







K7A403601B-QC equivalent, schematic
K7A403600B
K7A403200B
K7A401800B
128Kx36/x32 & 256Kx18 Synchronous SRAM
APPLICATION INFORMATION
DEPTH EXPANSION
The Samsung 128Kx36 Synchronous Pipelined Burst SRAM has two additional chip selects for simple depth expansion.
This permits easy secondary cache upgrades from 128K depth to 256K depth without extra logic.
Data
Address
A[0:17]
A[17]
A[0:16]
I/O[0:71]
A[17]
A[0:16]
CLK
64-Bits
Microprocessor
Address
CLK
Cache
Controller
Address Data
CS2
CS2
CLK
ADSC
WEx
OE
128Kx36
SPB
SRAM
(Bank 0)
CS1
ADV ADSP
Address Data
CS2
CS2
CLK
ADSC
WEx
OE
128Kx36
SPB
SRAM
(Bank 1)
CS1
ADV ADSP
ADS
INTERLEAVE READ TIMING (Refer to non-interleave write timing for interleave write timing)
(ADSP CONTROLLED , ADSC=HIGH)
Clock
ADSP
tSS tSH
ADDRESS
[0:n]
WRITE
A1
tWS
tWH
tAS tAH
A2
CS1
An+1
ADV
tCSS
tCSH
Bank 0 is selected by CS2, and Bank 1 deselected by CS2
tADVS
tADVH
Bank 0 is deselected by CS2, and Bank 1 selected by CS2
OE
Data Out
(Bank 0)
tOE
tLZOE
Q1-1
Data Out
(Bank 1)
*Notes : n = 14 32K depth
15 64K depth
16 128K depth
17 256K depth
Q1-2
Q1-3
tHZC
Q1-4
tCD
tLZC
- 16 -
Q2-1 Q2-2 Q2-3 Q2-4
Dont Care Undefined
Nov 2001
Rev 1.0










页数 18 页
下载[ K7A403601B-QC.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
K7A403601B-QC128Kx36/x32 & 256Kx18 Synchronous SRAMSamsung semiconductor
Samsung semiconductor

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap