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PDF ( 数据手册 , 数据表 ) K5P2880YCM

零件编号 K5P2880YCM
描述 Multi-Chip Package MEMORY 128M Bit 16Mx8 Nand Flash Memory / 8M Bit 1Mx8/512Kx16 Full CMOS SRAM
制造商 Samsung semiconductor
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K5P2880YCM 数据手册, 描述, 功能
K5P2880YCM - T085
Document Title
Multi-Chip Package MEMORY
128M Bit (16Mx8) Nand Flash Memory / 8M Bit (1Mx8/512Kx16) Full CMOS SRAM
Revision History
Revision No. History
0.0 Initial issue.
Draft Date
Jun. 11th 2001
Remark
Advanced
Information
Note : For more detailed features and specifications including FAQ, please refer to Samsungs’ web site.
http://samsungelectronics.com/semiconductors/products/products_index.html
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
- 1 - Revision 0.0
June. 2001







K5P2880YCM pdf, 数据表
K5P2880YCM - T085
BLOCK ERASE
The Erase operation is done on a block(8K Byte) basis. Block address loading is accomplished in two cycles initiated by an Erase
Setup command(60h). Only address A14 to A23 is valid while A9 to A13 is ignored. The Erase Confirm command(D0h) following the
block address loading initiates the internal erasing process. This two-step sequence of setup followed by execution command
ensures that memory contents are not accidentally erased due to external noise conditions.
At the rising edge of WE after the erase confirm command input, the internal write state-control handles erase and erase-verify.
When the erase operation is completed, the Write Status Bit(I/O 0) may be checked.
Figure 6 details the sequence.
Figure 6. Block Erase Operation
R/B
I/O0 ~ 7
60h
Address Input(2Cycle)
D0h
Block Add. : A9 ~ A23
tBERS
70h
I/O0 Pass
Fail
READ STATUS
The device contains a Status Register which may be read to find out whether program or erase operation is completed, and whether
the program or erase operation is completed successfully. After writing 70h command to the command register, a read cycle outputs
the content of the Status Register to the I/O pins on the falling edge of CE or RE, whichever occurs last. This two line control allows
the system to poll the progress of each device in multiple memory connections even when R/B pins are common-wired. RE or CE
does not need to be toggled for updated status. Refer to table 4 for specific Status Register definitions. The command register
remains in Status Read mode until further commands are issued to it. Therefore, if the status register is read during a random read
cycle, a read command(00h or 50h) should be given before sequential page read cycle.
Table4. Read Status Register Definition
I/O #
I/O0
Status
Program / Erase
I/O1
I/O2
Reserved for Future
I/O3 Use
I/O4
I/O5
I/O6 Device Operation
I/O7 Write Protect
Definition
"0" : Successful Program / Erase
"1" : Error in Program / Erase
"0"
"0"
"0"
"0"
"0"
"0" : Busy
"1" : Ready
"0" : Protected
"1" : Not Protected
- 8 - Revision 0.0
June. 2001







K5P2880YCM equivalent, schematic
K5P2880YCM - T085
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to VSS
Temperature Under Bias
Storage Temperature
Symbol
VIN
VCCf, VCCs
VccQ
TBIAS
TSTG
Rating
-0.5 to (Vccf,Vccs)+ 0.3
-0.2 to 3.6V
-0.2 to 3.6V
-25 to + 125
-65 to + 150
Unit
V
V
°C
°C
NOTE :
1. Minimum DC voltage is -0.5V on input/output pins. During transitions, this level may undershoot to -2.0V for periods <30ns.
Maximum DC voltage on input/output pins is VCCQ+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns.
2. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions
as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED OPERATING CONDITIONS
(Voltage reference to GND, TA=-25 to 85°C)
Parameter
Symbol
Min
Typ.
Max
Unit
Supply Voltage
VCCf, VCCs
2.7
3.0
3.3
V
Supply Voltage
VCCQ
2.7
3.0
3.3
V
Supply Voltage
VSS 0 0 0 V
DC AND OPERATING CHARACTERISTICS(Recommended operating conditions otherwise noted.)
Parameter
Symbol
Test Conditions
Min Max Unit
Input Leakage Current
VCCf,VCCS=VCCfMax.,VCCSMax.
ILI
VCCQf=VCCQfMax.,VIN=VCCQf or GND
- ±10 µA
Output Leakage Current
VCCf,VCCS=VCCfMax.,VCCSMax.
ILO
VCCQf=VCCQfMax.,VIN=VCCQf or GND
- ±10 µA
Input Low Voltage Level, All inputs VIL
-0.4 0.4
Input High Voltage Level
VIH
VccQf-0.4 VccQf+0.4
Output Low Voltage Level
Vccf/=Vccf Min, Vccs=Vccs Min
VOL
IOL = 0.1mA
- 0.4 V
Output High Voltage Level
Vccf=Vccf Min, Vccs=Vccs Min.
VOH IOH = -0.1mA
VccQ-0.3
-
- 16 -
Revision 0.0
June. 2001










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