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PDF ( 数据手册 , 数据表 ) 6N137

零件编号 6N137
描述 HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS
制造商 Fairchild Semiconductor
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6N137 数据手册, 描述, 功能
HIGH SPEED-10 MBit/s
LOGIC GATE OPTOCOUPLERS
SINGLE-CHANNEL
6N137
HCPL-2601
HCPL-2611
DUAL-CHANNEL
HCPL-2630
HCPL-2631
DESCRIPTION
The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/2631 dual-channel
optocouplers consist of a 850 nm AlGaAS LED, optically coupled to a very high
speed integrated photodetector logic gate with a strobable output. This output
features an open collector, thereby permitting wired OR outputs. The coupled
parameters are guaranteed over the temperature range of -40°C to +85°C. A
maximum input signal of 5 mA will provide a minimum output sink current of 13
mA (fan out of 8).
An internal noise shield provides superior common mode rejection of typically 10
kV/µs. The HCPL- 2601 and HCPL- 2631 has a minimum CMR of 5 kV/µs.
The HCPL-2611 has a minimum CMR of 10 kV/µs.
8
FEATURES
• Very high speed-10 MBit/s
• Superior CMR-10 kV/µs
• Double working voltage-480V
• Fan-out of 8 over -40°C to +85°C
• Logic gate output
• Strobable output
• Wired OR-open collector
• U.L. recognized (File # E90700)
N/C 1
+2
V
F
_3
8
V
CC
7
V
E
6V
O
APPLICATIONS
• Ground loop elimination
• LSTTL to TTL, LSTTL or 5-volt CMOS
• Line receiver, data transmission
• Data multiplexing
• Switching power supplies
• Pulse transformer replacement
• Computer-peripheral interface
N/C 4
5 GND
6N137
HCPL-2601
HCPL-2611
TRUTH TABLE
(Positive Logic)
Input
H
L
H
L
H
L
Enable
H
H
L
L
NC
NC
A 0.1 µF bypass capacitor must be connected between pins 8 and 5.
(See note 1)
8
1
8
1
1
+1
V
F1
_2
_3
V
F2
+4
8
V
CC
7
V
01
6V
02
5 GND
HCPL-2630
HCPL-2631
Output
L
H
H
H
L
H
2001 Fairchild Semiconductor Corporation
DS300202 7/9/01
1 OF 11
www.fairchildsemi.com







6N137 pdf, 数据表
SINGLE-CHANNEL
6N137
HCPL-2601
HCPL-2611
HIGH SPEED-10 MBit/s
LOGIC GATE OPTOCOUPLERS
DUAL-CHANNEL
HCPL-2630
HCPL-2631
A
B
VFF
IF
1
2
3
VCC
8
7 .1 Ef
bypass
6
45
GND
VCM
Pulse Gen
+5V
350 1
Output
(VO)
Peak
VCM
0V
5V
VO
VO
0.5 V
Switching Pos. (A), I F= 0
VO (Min)
VO (Max)
Switching Pos. (B), I F= 7.5 mA
CM H
CM L
Fig. 14 Test Circuit Common Mode Transient Immunity
www.fairchildsemi.com
8 OF 11
7/9/01 DS300202














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