DataSheet8.cn


PDF ( 数据手册 , 数据表 ) 74ALVC16839

零件编号 74ALVC16839
描述 Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
制造商 Fairchild Semiconductor
LOGO Fairchild Semiconductor LOGO 


1 Page

No Preview Available !

74ALVC16839 数据手册, 描述, 功能
December 2001
Revised December 2001
74ALVC16839
Low Voltage 20-Bit Selectable Register/Buffer
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16839 contains twenty non-inverting selectable
buffered or registered paths. The device can be configured
to operate in a registered, or flow through buffer mode by
utilizing the register enable (REGE) and Clock (CLK) sig-
nals. The device operates in a 20-bit word wide mode. All
outputs can be placed into 3-STATE through use of the OE
pin. These devices are ideally suited for buffered or regis-
tered 168 pin and 200 pin SDRAM DIMM memory mod-
ules.
The 74ALVC16839 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74ALVC16839 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
s Compatible with PC100 and PC133 DIMM module
specifications
s 1.65V to 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s tPD (CLK to On)
3.7 ns max for 3.0V to 3.6V VCC
4.9 ns max for 2.3V to 2.7V VCC
8.8 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion and withdrawal (Note 1)
s Uses patented noise/EMI reduction circuitry
s Latchup conforms to JEDEC JED78
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number Package Number
Package Descriptions
74ALVC16839MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
Description
OE
I0I19
O0O19
CLK
REGE
Output Enable Input (Active LOW)
Inputs
Outputs
Clock Input
Register Enable Input
© 2001 Fairchild Semiconductor Corporation DS500713
www.fairchildsemi.com












页数 6 页
下载[ 74ALVC16839.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
74ALVC16834A18-bit registered driver with inverted register enable 3-StateNXP Semiconductors
NXP Semiconductors
74ALVC16834ADGG18-bit registered driver with inverted register enable 3-StateNXP Semiconductors
NXP Semiconductors
74ALVC16835Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and OutputsFairchild Semiconductor
Fairchild Semiconductor
74ALVC16835A18-bit registered driver 3-StateNXP Semiconductors
NXP Semiconductors

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap