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PDF ( 数据手册 , 数据表 ) 74ALVC164245DGG

零件编号 74ALVC164245DGG
描述 16-bit dual supply translating transceiver
制造商 NXP Semiconductors
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74ALVC164245DGG 数据手册, 描述, 功能
74ALVC164245
16-bit dual supply translating transceiver; 3-state
Rev. 8 — 15 March 2012
Product data sheet
1. General description
The 74ALVC164245 is a high-performance, low-power, low-voltage, Si-gate CMOS
device, superior to most advanced CMOS compatible TTL families.
The 74ALVC164245 is a 16-bit (dual octal) dual supply translating transceiver featuring
non-inverting 3-state bus compatible outputs in both send and receive directions. It is
designed to interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply
environment.
This device can be used as two 8-bit transceivers or one 16-bit transceiver.
The direction control inputs (1DIR and 2DIR) determine the direction of the data flow.
nDIR (active HIGH) enables data from nAn ports to nBn ports. nDIR (active LOW) enables
data from nBn ports to nAn ports. The output enable inputs (1OE and 2OE), when HIGH,
disable both nAn and nBn ports by placing them in a high-impedance OFF-state. Pins
nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B).
In suspend mode, when one of the supply voltages is zero, there will be no current flow
from the non-zero supply towards the zero supply. The nAn-outputs must be set 3-state
and the voltage on the A-bus must be smaller than Vdiode (typical 0.7 V). VCC(B) VCC(A)
(except in suspend mode).
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range:
3 V port (VCC(A)): 1.5 V to 3.6 V
5 V port (VCC(B)): 1.5 V to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Control inputs voltage range from 2.7 V to 5.5 V
Inputs accept voltages up to 5.5 V
High-impedance outputs when VCC(A) or VCC(B) = 0 V
Complies with JEDEC standard JESD8-B/JESD36
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +85 C and 40 C to +125 C







74ALVC164245DGG pdf, 数据表
NXP Semiconductors
74ALVC164245
16-bit dual supply translating transceiver; 3-state
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
Tamb = 40 C to +85 C
Min Typ[1] Max
Tamb = 40 C to +125 C Unit
Min Typ[1] Max
VIH HIGH-level nBn port
input voltage
VCC(B) = 3.0 V to 5.5 V
nAn port, nOE and nDIR
[2] 2.0
--
2.0
- -V
VCC(A) = 3.0 V to 3.6 V
2.0
VCC(A) = 2.3 V to 2.7 V
[2] 1.7
VIL LOW-level nBn port
input voltage
VCC(B) = 4.5 V to 5.5 V
[2]
-
VCC(B) = 3.0 V to 3.6 V [2] -
nAn port, nOE and nDIR
--
--
- 0.8
- 0.7
2.0
1.7
-
-
- -V
- -V
- 0.8 V
- 0.7 V
VCC(A) = 3.0 V to 3.6 V
-
VCC(A) = 2.3 V to 2.7 V [2] -
- 0.8
- 0.7
-
-
- 0.8 V
- 0.7 V
VOH HIGH-level nBn port; VI = VIH or VIL
output voltage IO = 24 mA; VCC(B) = 4.5 V
VCC(B) 0.8 -
- VCC(B) 1.2 -
-V
IO = 12 mA; VCC(B) = 4.5 V
VCC(B) 0.5 -
- VCC(B) 0.8 -
-V
IO = 18 mA; VCC(B) = 3.0 V
VCC(B) 0.8 -
- VCC(B) 1.0 -
-V
IO = 100 A; VCC(B) = 3.0 V
VCC(B) 0.2 VCC(B) - VCC(B) 0.3 VCC(B) - V
nAn port; VI = VIH or VIL
IO = 24 mA; VCC(A) = 3.0 V
VCC(A) 0.7 -
- VCC(A) 1.0 -
-V
IO = 100 A; VCC(A) = 3.0 V
VCC(A) 0.2 -
- VCC(A) 0.3 -
-V
IO = 12 mA; VCC(A) = 2.7 V
VCC(A) 0.5 -
- VCC(A) 0.8 -
-V
IO = 8 mA; VCC(A) = 2.3 V
VCC(A) 0.6 -
- VCC(A) 0.6 -
-V
IO = 100 A; VCC(A) = 2.3 V
VCC(A) 0.2 VCC(A) - VCC(A) 0.3 VCC(A) - V
VOL
LOW-level
nBn port; VI = VIH or VIL
output voltage IO = 24 mA; VCC(B) = 4.5 V
-
- 0.55
-
- 0.60 V
IO = 12 mA; VCC(B) = 4.5 V
-
- 0.40
-
- 0.80 V
IO = 100 A; VCC(B) = 4.5 V
-
- 0.20
-
- 0.30 V
IO = 18 mA; VCC(B) = 3.0 V
-
- 0.55
-
- 0.80 V
IO = 100 A; VCC(B) = 3.0 V
-
- 0.20
-
- 0.30 V
nAn port; VI = VIH or VIL
IO = 24 mA; VCC(A) = 3.0 V
-
- 0.55
-
- 0.80 V
IO = 100 A; VCC(A) = 3.0 V
-
- 0.20
-
- 0.30 V
IO = 12 mA; VCC(A) = 2.7 V
-
- 0.40
-
- 0.60 V
IO = 12 mA; VCC(A) = 2.3 V
-
- 0.60
-
- 0.60 V
IO = 100 A; VCC(A) = 2.3 V
-
- 0.20
-
- 0.20 V
II input leakage VI = 5.5 V or GND
current
- 0.1 5 - 0.1 10 A
IOZ
OFF-state
VI = VIH or VIL;
output current VO = VCC or GND
[3] -
0.1 10
-
0.1 20 A
74ALVC164245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 15 March 2012
© NXP B.V. 2012. All rights reserved.
8 of 20







74ALVC164245DGG equivalent, schematic
NXP Semiconductors
74ALVC164245
16-bit dual supply translating transceiver; 3-state
HXQFN60: plastic compatible thermal enhanced extremely thin quad flat package; no leads;
60 terminals; body 4 x 6 x 0.5 mm
D BA
SOT1134-2
terminal 1
index area
A A2
E
A1
detail X
e2
b
e1 eR
v CAB e
wC
1/2 e
eT
L1 D2
A11
A16 D3
D6
B8 B10
D7
v CAB
wC
y1 C
C
y
L
eR eT
A10
B7
A17
B11
e
Eh e3 e4
1/2 e
B1
A1
terminal 1
index area
D5
D1
B20 B18
A32 Dh A27
B17
A26
D8
D4
eT eR
eT K
X
Dimensions
eR
0
5 mm
Unit A A1 A2 b D Dh E Eh e e1 e2 e3 e4 eR eT K L L1 v w y y1
max 0.50 0.08 0.42 0.28 4.1 1.95 6.1 3.95
0.25 0.28 0.195
mm nom
0.05 0.40 0.23 4.0 1.85 6.0 3.85 0.5 1.0 2.5 3.0 4.5 0.5 0.49 0.20 0.23 0.145 0.1 0.05 0.08 0.1
min 0.02 0.38 0.18 3.9 1.75 5.9 3.75
0.15 0.18 0.095
sot1134-2_po
Outline
version
References
IEC JEDEC
JEITA
European
projection
Issue date
SOT1134-2
--- ---
---
11-08-15
Fig 10. Package outline SOT1134-2 (HXQFN60)
74ALVC164245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 15 March 2012
© NXP B.V. 2012. All rights reserved.
16 of 20










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