DataSheet8.cn


PDF ( 数据手册 , 数据表 ) DT70V27L

零件编号 DT70V27L
描述 HIGH-SPEED 3.3V 32K x 16 DUAL-PORT STATIC RAM
制造商 Integrated Device Technology
LOGO Integrated Device Technology LOGO 


1 Page

No Preview Available !

DT70V27L 数据手册, 描述, 功能
HIGH-SPEED 3.3V
32K x 16 DUAL-PORT
STATIC RAM
IDT70V27S/L
Features:
x True Dual-Ported memory cells which allow simultaneous
access of the same memory location
x High-speed access
– Industrial: 35ns (max.)
– Commercial: 15/20/25/35/55ns (max.)
x Low-power operation
– IDT70V27S
Active: 500mW (typ.)
Standby: 3.3mW (typ.)
– IDT70V27L
Active: 500mW (typ.)
Standby: 660µW (typ.)
x Separate upper-byte and lower-byte control for bus
matching capability
x Dual chip enables allow for depth expansion without
external logic
Functional Block Diagram
R/WL
UBL
CE0L
CE1L
OEL
LBL
x IDT70V27 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
one device
x M/S = VIH for BUSY output flag on Master,
M/S = VIL for BUSY input on Slave
x Busy and Interrupt Flags
x On-chip port arbitration logic
x Full on-chip hardware support of semaphore signaling
between ports
x Fully asynchronous operation from either port
x LVTTL-compatible, single 3.3V (±0.3V) power supply
x Available in 100-pin Thin Quad Flatpack (TQFP), 108-pin
Ceramic Pin Grid Array (PGA), and 144-pin Fine Pitch BGA
(fpBGA)
x Industrial temperature range (-40°C to +85°C) is available
for selected speeds
R/WR
UBR
CE0R
CE1R
OER
LBR
I/O8-15L
I/O0-7L
BUSYL (1,2)
I/O
Control
I/O
Control
A14L
A0L
Address
Decoder
A14L
A0L
CE0L
CE1L
OEL
R/WL
32Kx16
MEMORY
ARRAY
70V27
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
SEM L
NOTES:
INT
(2)
L
M/S (2)
1) BUSY is an input as a Slave (M/S=VIL) and an output as a Master (M/S=VIH).
2) BUSY and INT are non-tri-state totem-pole outputs (push-pull).
©2000 Integrated Device Technology, Inc.
6.011
Address
Decoder
A14R
A0R
CE0R
CE1R
OER
R/WR
I/O8-15R
I/O0-7R
BUSYR(1,2)
A14R
A0R
SEMR
INTR(2)
3603 drw 01
JANUARY 2001
DSC 3603/7







DT70V27L pdf, 数据表
IDT 70V27S/L
High-Speed 3.3V 32K x 16 Dual-Port Static RAM
Commercial and Industrial Temperature Range
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range(1,6,7) (VCC = 3.3V ± 0.3V)
70V27X35
Com'l & Ind
70V27X55
Com'l Only
Symbol
Parameter
Test Condition
Version Typ.(2) Max. Typ.(2) Max. Unit
ICC Dynamic Operating Current CE = VIL, Outputs Disabled
(Both Ports Active)
SEM = VIH
f = fMAX(3)
COM'L S 135 235 125 225 mA
L 135 190 125 180
IND'L S 135 270 125 260
L 135 235 125 225
ISB1 Standby Current
(Bo th Ports - TTL Level
Inputs)
CEL = CER = VIH
SEMR = SEML = VIH
f = fMAX(3)
COM'L S 22 45 15 40 mA
L 22 35 15 30
IND'L S 22 55 15 50
L 22 45 15 40
ISB2 Standby Current
(One Port - TTL Level
Inputs)
CE"A" = VIL and CE"B" = VIH(5)
Active Port Outputs Disabled,
f=fMAX(3)
SEMR = SEML = VIH
COM'L S 85 140 75 140 mA
L 85 125 75 125
IND'L
S 85
160
75
160
L 85 140 75 140
ISB3 Full Standby Current (Both Both Ports CEL and
Ports - All CMOS Level CER > VCC - 0.2V
Inputs)
VIN > VCC - 0.2V or
VIN < 0.2V, f = 0(4)
SEMR = SEML > VCC - 0.2V
ISB4 Full Standby Current
(One Port - All CMOS
Level Inputs)
CE"A" < 0.2V and
CE"B" > VCC - 0.2V(5)
SEMR = SEML > VCC - 0.2V
VIN > VCC - 0.2V or VIN < 0.2V
Active Port Outputs Disabled
f = fMAX(3)
COM'L S 1.0 6 1.0 6 mA
L 0.2 3 0.2 3
IND'L S 1.0 10 1.0 10
L 0.2 6 0.2 6
COM'L S 85 135 75 135 mA
L 85 120 75 120
IND'L
S 85
L 85
160
135
75
75
160
135
NOTES:
3603 tbl 10b
1. 'X' in part numbers indicates power rating (S or L).
2. VCC = 3.3V, TA = +25°C, and are not production tested. ICCDC = 90mA (Typ.)
3. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, and using AC Test Conditionsof input
levels of GND to 3V.
4. f = 0 means no address or control lines change.
5. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
6. Refer to Chip Enable Truth Table.
7. Industrial temperature: for other speeds, packages and powers contact your sales office.
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns Max.
1.5V
1.5V
Figures 1 and 2
3603 tbl 11
DATAOUT
BUSY
INT
435
3.3V
590
30pF
DATAOUT
435
3.3V
590
5pF*
Figure 1. AC Output Test Load
3603 drw 04
Figure 2. Output Test Load
(for tLZ, tHZ, tWZ, tOW)
*Including scope and jig.
8







DT70V27L equivalent, schematic
IDT 70V27S/L
High-Speed 3.3V 32K x 16 Dual-Port Static RAM
Commercial and Industrial Temperature Range
Waveform of BUSY Arbitration Controlled by CE Timing (M/S = VIH)(1,3)
ADDR"A"
and "B"
ADDRESSES MATCH
CE"A"
CE"B"
BUSY"B"
tAPS (2)
tBAC
tBDC
3603 drw 13
Waveform of BUSY Arbitration Cycle Controlled by Address Match
Timing (M/S = VIH)(1)
ADDR"A"
tAPS(2)
ADDRESS "N"
ADDR"B"
BUSY"B"
MATCHING ADDRESS "N"
tBAA
tBDA
3603 drw 14
NOTES:
1. All timing is the same for left and right ports. Port Amay be either the left or right port. Port Bis the port opposite from port A.
2. If tAPS is not satisfied, the busy signal will be asserted on one side or another but there is no guarantee on which side busy will be asserted.
3. Refer to Chip Enable Truth Table.
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range(1,2)
70V27X15
70V27X20
Com'l Only Com'l Only
Symbol
Parameter
Min. Max. Min. Max.
INTERRUPT TIMING
tAS Address Set-up Time
0 0____
____
tWR Write Recovery Time
0 0____
____
tINS Interrupt Set Time
____ 15 ____ 20
tINR Interrupt Reset Time
____ 25 ____ 20
Symbol
INTERRUPT TIMING
tAS Address Set-up Time
tWR Write Recovery Time
tINS Interrupt Set Time
tINR Interrupt Reset Time
Parameter
NOTES:
1. 'X' in part numbers indicates power rating (S or L).
2. Industrial temperature: for other speeds, packages and powers contact your sales office.
70V27X35
Com'l &Ind
Min. Max.
0 ____
0 ____
____ 30
____ 35
70V27X25
Com'l Only
Min. Max.
Unit
0 ____ ns
0 ____ ns
____ 25
ns
____ 35 ns
3603 tbl 15a
70V27X55
Com'l Only
Min. Max. Unit
0 ____ ns
0 ____ ns
____ 40
ns
____ 45
ns
3603 tbl 15b
16










页数 22 页
下载[ DT70V27L.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
DT70V27LHIGH-SPEED 3.3V 32K x 16 DUAL-PORT STATIC RAMIntegrated Device Technology
Integrated Device Technology
DT70V27SHIGH-SPEED 3.3V 32K x 16 DUAL-PORT STATIC RAMIntegrated Device Technology
Integrated Device Technology

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap