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零件编号 | DM74LS09N | ||
描述 | Quad 2-Input AND Gates with Open-Collector Outputs | ||
制造商 | Fairchild Semiconductor | ||
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1 Page
August 1986
Revised March 2000
DM74LS09
Quad 2-Input AND Gates with Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic AND function. The open-collector out-
puts require external pull-up resistors for proper logical
operation.
Pull-Up Resistor Equations
Where:
N1 (IOH) = total maximum output high current
for all outputs tied to pull-up resistor
N2 (IIH) = total maximum input high current for
all inputs tied to pull-up resistor
N3 (IIL) = total maximum input low current for
all inputs tied to pull-up resistor
Ordering Code:
Order Number Package Number
Package Description
DM74LS09M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS09N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel.
Connection Diagram
Function Table
Y = AB
Inputs
AB
LL
LH
HL
HH
H = HIGH Logic Level
L = LOW Logic Level
Output
Y
L
L
L
H
© 2000 Fairchild Semiconductor Corporation DS006348
www.fairchildsemi.com
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页数 | 4 页 | ||
下载 | [ DM74LS09N.PDF 数据手册 ] |
零件编号 | 描述 | 制造商 |
DM74LS09 | Quad 2-Input AND Gates with Open-Collector Outputs | Fairchild Semiconductor |
DM74LS09M | Quad 2-Input AND Gates with Open-Collector Outputs | Fairchild Semiconductor |
DM74LS09N | Quad 2-Input AND Gates with Open-Collector Outputs | Fairchild Semiconductor |
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