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PDF ( 数据手册 , 数据表 ) E712545

零件编号 E712545
描述 8-bit Proprietary Microcontroller
制造商 Fujitsu Media Devices Limited
LOGO Fujitsu Media Devices Limited LOGO 


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E712545 数据手册, 描述, 功能
FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12545-1E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89960 Series
MB89965/P965A/F969A/
MB89PV960
s DESCRIPTION
The MB89960 series is a single-chip microcontroller that utilizes the F2MC-8L core for low voltage and high speed
performance. The microcontroller contains a range of peripheral functions including timers, a serial interface, I2C
interface, A/D converter, and external interrupts. The internal I2C interface complies with the SM bus standard
and supports an SM bus battery controller.
s FEATURES
• Range of package options
• QFP and MQFP packages (0.8 mm pitch)
• LQFP package (0.5 mm and 0.65 mm pitch)
High speed operation at low voltage
Minimum instruction execution time = 0.4 µs (for a 10 MHz oscillation)
F2MC-8L CPU core
Instruction set optimized for controller applications
• Multiplication and division instructions
• 16-bit arithmetic operations
• Bit test branch instructions
• Bit manipulation instructions, etc.
Dual-clock control system
• Main clock : 10 MHz max.
(Four speed settings available, oscillation halts in sub-clock mode)
• Sub-clock : 32.768 kHz (Operation clock for sub-clock mode)
Four channels
• 8/16-bit timer/counter (8-bit × 2 channels or 16-bit × 1 channel)
• 21-bit timebase timer
• Clock prescaler (15-bit)
Serial I/O
Selectable transfer format (MSB-first or LSB-first) supports communications with a wide range of devices.
A/D converter
10-bit × 4 channels







E712545 pdf, 数据表
MB89960 Series
(Continued)
(TOP VIEW)
TEST
MOD2
AVCC
RST
MOD0
MOD1
X0
X1
VCC
X0A
X1A
P27
P26
P25
N.C.
N.C.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48 N.C.
47 N.C.
46 P34/TO/CLK
45 C
44 P00/INT20
43 P01/INT21
42 P02/INT22
41 P03/INT23
40 P04/INT24
39 P05/INT25
38 P06/INT26
37 P07/INT27
36 P10/INT10
35 P11/INT11
34 N.C.
33 N.C.
(FPT-64P-M09)
8







E712545 equivalent, schematic
MB89960 Series
s PROGRAMMING AND ERASING FLASH MEMORY ON THE MB89F969A
1. Flash Memory
The flash memory is located between 1000H and FFFFH in the CPU memory map and incorporates a flash
memory interface circuit that allows read access and program access from the CPU to be performed in the same
way as mask ROM. Programming and erasing flash memory is also performed via the flash memory interface
circuit by executing instructions in the CPU. This enables the flash memory to be updated in place under the
control of the CPU, providing an efficient method of updating program and data.
2. Flash Memory Features
• 60 K byte × 8-bit configuration (16 K + 8 K + 8 K + 28 K sectors)
• Automatic programming algorithm (Embedded algorithm* : Equivalent to MBM29LV200)
• Includes an erase pause and restart function
• Data polling and toggle bit for detection of program/erase completion
• Detection of program/erase completion via CPU interrupt
• Compatible with JEDEC-standard commands
• Sector Protection (sectors can be combined in any combination)
• No. of program/erase cycles : 10,000 (min.)
Embedded Algorithm is a trademark of Advanced Micro Devices.
3. Procedure for Programming and Erasing Flash Memory
Programming and reading flash memory cannot be performed at the same time. Accordingly, to program or
erase flash memory, the program must first be copied from flash memory to RAM so that programming can be
performed without program access from flash memory.
4. Flash Memory Register
• Control status register (FMCS)
Address
002EH
bit7 bit6 bit5
INTE RDYINT WE
bit4 bit3 bit2 bit1 bit0 Initial value
RDY Reserved Reserved Reserved 000X00-0B
R/W R/W R/W R R/W R/W R/W
5. Sector Configuration
The table below shows the sector configuration of flash memory and lists the addresses of each sector for both
during CPU access a flash memory programming.
• Sector configuration of flash memory
Flash Memory
16 K bytes
8 K bytes
8 K bytes
28 K bytes
CPU Address
FFFFH to C000H
BFFFH to A000H
9FFFH to 8000H
7FFFH to 1000H
Programmer Address
1FFFFH to 1C000H
1BFFFH to 1A000H
19FFFH to 18000H
17FFFH to 11000H
* : Programmer address
The programmer address is the address to be used instead of the CPU address when programming data from
a parallel flash memory programmer. Use the programmer address on programming or erasing using a general-
purpose parallel programmer.
16










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