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PDF ( 数据手册 , 数据表 ) FQD9N08

零件编号 FQD9N08
描述 80V N-Channel MOSFET
制造商 Fairchild Semiconductor
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FQD9N08 数据手册, 描述, 功能
FQD9N08 / FQU9N08
80V N-Channel MOSFET
December 2000
QFETTM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology is especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as automotive,
high efficiency switching for DC/DC converters, and DC
motor control.
Features
• 9.3A, 80V, RDS(on) = 0.21@VGS = 10 V
• Low gate charge ( typical 5.9 nC)
• Low Crss ( typical 13 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D-PAK
FQD Series
GDS
I-PAK
FQU Series
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8from case for 5 seconds
D
!
"
!"
G!
"
"
!
S
FQD9N08 / FQU9N08
80
7.4
4.68
29.6
± 25
55
7.4
2.5
6.5
2.5
25
0.2
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Typ Max Units
-- 5.0 °C/W
-- 50 °C/W
-- 110 °C/W
Rev. A2, December 2000







FQD9N08 pdf, 数据表
Package Dimensions (Continued)
(0.50)
6.60 ±0.20
5.34 ±0.20
(4.34)
IPAK
(0.50)
2.30 ±0.20
0.50 ±0.10
MAX0.96
0.76 ±0.10
2.30TYP
[2.30±0.20]
2.30TYP
[2.30±0.20]
0.50 ±0.10
©2000 Fairchild Semiconductor International
Rev. A2, December 2000














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