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PDF ( 数据手册 , 数据表 ) FQD5P10

零件编号 FQD5P10
描述 100V P-Channel MOSFET
制造商 Fairchild Semiconductor
LOGO Fairchild Semiconductor LOGO 


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FQD5P10 数据手册, 描述, 功能
FQD5P10 / FQU5P10
100V P-Channel MOSFET
QFET TM
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
Features
• -3.6A, -100V, RDS(on) = 1.05@VGS = -10 V
• Low gate charge ( typical 6.3 nC)
• Low Crss ( typical 18 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
D
GS
D-PAK
FQD Series
GDS
I-PAK
FQU Series
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TA = 25°C) *
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
FQD5P10 / FQU5P10
-100
-3.6
-2.28
-14.4
± 30
55
-3.6
2.5
-6.0
2.5
25
0.2
-55 to +150
300
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
* When mounted on the minimum pad size recommended (PCB Mount)
©2002 Fairchild Semiconductor Corporation
Typ Max
-- 5.0
-- 50
-- 110
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
Rev. B, August 2002







FQD5P10 pdf, 数据表
Package Dimensions (Continued)
(0.50)
6.60 ±0.20
5.34 ±0.20
(4.34)
I-PAK
(0.50)
2.30 ±0.20
0.50 ±0.10
MAX0.96
0.76 ±0.10
2.30TYP
[2.30±0.20]
2.30TYP
[2.30±0.20]
0.50 ±0.10
©2002 Fairchild Semiconductor Corporation
Dimensions in Millimeters
Rev. B, August 2002














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