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PDF ( 数据手册 , 数据表 ) M27C1001-10XB3X

零件编号 M27C1001-10XB3X
描述 1 Mbit 128Kb x8 UV EPROM and OTP EPROM
制造商 STMicroelectronics
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M27C1001-10XB3X 数据手册, 描述, 功能
M27C1001
1 Mbit (128Kb x8) UV EPROM and OTP EPROM
s 5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
s ACCESS TIME: 35ns
s LOW POWER CONSUMPTION:
– Active Current 30mA at 5Mhz
– Standby Current 100µA
s PROGRAMMING VOLTAGE: 12.75V ± 0.25V
s PROGRAMMING TIME: 100µs/word
s ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 05h
DESCRIPTION
The M27C1001 is a 1 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processor systems requiring large programs and
is organized as 131,072 words of 8 bits.
The FDIP32W (window ceramic frit-seal package)
and the LCCC32W (leadless chip carrier package)
have a transparent lids which allow the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C1001 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
32
1
FDIP32W (F)
32
1
PDIP32 (B)
LCCC32W (L)
PLCC32 (K)
Figure 1. Logic Diagram
TSOP32 (N)
8 x 20 mm
VCC VPP
17
A0-A16
8
Q0-Q7
P M27C1001
E
G
VSS
AI00710B
January 2000
1/17







M27C1001-10XB3X pdf, 数据表
M27C1001
Figure 6. Programming and Verify Modes AC Waveforms
A0-A16
Q0-Q7
VPP
VCC
E
P
G
tAVPL
DATA IN
tQVPL
tVPHPL
tVCHPL
tELPL
tPLPH
VALID
tPHQX
DATA OUT
tGLQV
tQXGL
tGHQZ
tGHAX
PROGRAM
VERIFY
AI00714
Figure 7. Programming Flowchart
VCC = 6.25V, VPP = 12.75V
n=0
NO
++n
= 25
YES
P = 100µs Pulse
NO
VERIFY
YES
++ Addr
FAIL
Last NO
Addr
YES
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
AI00715C
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the
whole array to be programmed, with a guaranteed
margin, in a typical time of 13 seconds. Program-
ming with PRESTO II involves in applying a se-
quence of 100µs program pulses to each byte until
a correct verify occurs (see Figure 7). During pro-
gramming and verify operation, a MARGIN MODE
circuit is automatically activated in order to guar-
antee that each cell is programmed with enough
margin. No overprogram pulse is applied since the
verify in MARGIN MODE provides necessary mar-
gin to each programmed cell.
Program Inhibit
Programming of multiple M27C1001s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C1001 may be common. A TTL low level
pulse applied to a M27C1001’s P input, with E low
and VPP at 12.75V, will program that M27C1001.
A high level E input inhibits the other M27C1001s
from being programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with E
and G at VIL, P at VIH, VPP at 12.75V and VCC at
6.25V.
8/17







M27C1001-10XB3X equivalent, schematic
M27C1001
Table 17. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Mechanical Data
mm inches
Symb
Typ Min Max Typ Min Max
A 1.20 0.047
A1 0.05 0.15
0.002
0.007
A2 0.95 1.05
0.037
0.041
B
0.15 0.27
0.006
0.011
C
0.10 0.21
0.004
0.008
D
19.80
20.20
0.780
0.795
D1
18.30
18.50
0.720
0.728
E
7.90 8.10
0.311
0.319
e 0.50
-
- 0.020 -
-
L
0.50 0.70
0.020
0.028
α 0° 5°
0° 5°
N 32
32
CP 0.10
0.004
Figure 12. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Outline
A2
1N
e
N/2
D1
D
E
B
A
CP
DIE
TSOP-a
Drawing is not to scale.
16/17
C
A1 α L










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