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PDF ( 数据手册 , 数据表 ) AU5790

零件编号 AU5790
描述 Single wire CAN transceiver
制造商 NXP Semiconductors
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AU5790 数据手册, 描述, 功能
INTEGRATED CIRCUITS
AU5790
Single wire CAN transceiver
Product data
Supersedes data of 2001 Jan 31
IC18 Data Handbook
2001 May 18
Philips
Semiconductors







AU5790 pdf, 数据表
Philips Semiconductors
Single wire CAN transceiver
Product data
AU5790
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Pin CANH (continued)
–ICANHH
ICANLG
Bus short circuit current in
high-speed mode
Bus leakage current at loss of
ground
(I_CAN_LG = I_CANH + I_RTH)
VCANH = –1 V,
TxD = 0 V; NSTB = 5 V; EN = 0 V;
8 V < VBAT < 16 V
0 V < VBAT < 16 V;
see Figure 3 in the test circuits
section
50
–50
190 mA
50 µA
Tsd Thermal shutdown
Note 2
155
Thys
Thermal shutdown hysteresis
Note 2
5
VT Bus input threshold
5.8 V < VBAT < 27 V,
all modes except sleep mode
1.8
190 °C
15 °C
2.2 V
VTL Bus input threshold, low battery 5.5 V < VBAT < 5.8 V,
1.5
all modes except sleep mode
2.2 V
VTS
VTSL
Pin RTH
Bus input threshold in sleep mode
Bus input threshold in sleep mode,
low battery
NSTB = 0 V, EN = 0 V,
VBAT > 11.3 V
NSTB = 0 V, EN = 0 V,
5.5 V < VBAT < 11.3 V
6.15
VBAT – 4.3
8.1
VBAT – 3.25
V
V
VRTH1
Voltage on switched ground pin
VRTH2
Voltage on switched ground pin
Pins NSTB, EN
IRTH = 1 mA
IRTH = 6 mA
0.1 V
1V
Vih High level input voltage 5.5 V < VBAT < 27 V
3
V
Vil Low level input voltage 5.5 V < VBAT < 27 V
1V
Ii Input current
Vi = 1 V and Vi = 5 V 15 50 µA
Pin TxD
Vitxd
–Iiltxd
–Iihtxd
TxD input threshold
TxD low level input current in
normal mode
TxD high level input current in
sleep mode
5.5 V < VBAT < 27 V
NSTB = 5 V, EN = 5 V, VTxD = 0 V
NSTB = 0 V, EN = 0 V, VTxD = 5 V
1
50
–5
3V
180 µA
10 µA
Pin RxD
Volrxd
RxD low level output voltage
IRxD = 2.2 mA;
VCANH = 10 V, all modes
0.45 V
Iolrxd
RxD low level output current
VRxD = 5 V; VCANH = 10 V
3
35 mA
Iohrxd
RxD high level leakage
VRxD = 5 V; VCANH = 0 V,
all modes
–10
+10 µA
NOTES:
1. Operation at battery voltages down to 5.3 volts is guaranteed by design. Operation higher than 18 volts (18 V < VBAT < 27 V) for up to two
minutes is permitted if the thermal design of the board prevents reaching the thermal protection temperature limit, Tsd, otherwise the device
will self protect. Typically these requirements will be encountered during jump start operation at Tamb 85 °C and VBAT < 27 V. Refer to the
“Thermal Characteristics” section of this data sheet, or application note AN2005 for guidance.
2. This parameter is characterized but not subject to production test.
2001 May 18
8







AU5790 equivalent, schematic
Philips Semiconductors
Single wire CAN transceiver
Product data
AU5790
Power Dissipation
Power dissipation of an IC is the major factor determining junction
temperature. AU5790 power dissipation in active and passive states
are different. The average power dissipation is:
where:
Ptot = PINT*Dy + PPNINT * (1-Dy)
Ptot is total dissipation power;
PINT is dissipation power in an active state;
PPNINT is dissipation power in a passive state;
Dy is duty cycle, which is the percentage of time that TxD
is in an active state during any given time duration.
At passive state there is no current going into the load. So
all of the supply current is dissipated inside the IC.
where:
PPNINT = VBAT * IBATPN
VBAT is the battery voltage;
IBATPN is the passive state supply current in normal mode.
In an active state, part of the supply current goes to the
load, and only part of the supply current dissipates inside
the IC, causing an incremental increase in junction
temperature.
where:
PINT = PBATAN – PLOADN
PBATAN is active state battery supply power in normal
mode;
where:
PBATAN = VBAT * IBATAN
PLOADN is load power consumption in normal mode.
PLOADN = VCANHN * ILOADN
IBATAN is active state supply current in normal mode;
VCANHN is bus output voltage in normal mode;
ILOADN is current going through load in normal mode.
where:
ILOAD = VCANHN/RLOAD
IBATN = ILOAD + IINT
IINT is an active state current dissipated within the IC in
normal mode.
IINT will decrease slightly when the node number
decreases. To simplify this analysis, we will assume IINT is
fixed.
IINT = IBATN (32 nodes) – ILOAD (32 nodes)
IBATN (32 nodes) may be found in the DC Characteristics
table.
A power dissipation example follows. The assumed values
are chosen from specification and typical applications.
Assumptions:
VBAT = 13.4 V
RT = 9.1 k
32 nodes
IBATPN = 2 mA
IBATN (32 nodes) = 35 mA
VCANHN = 4.55 V
Duty cycle = 50%
Computations:
RLOAD = 9.1 k/ 32 = 284.4
PPNINT = 13.4 V × 2 mA = 26.8 mW
ILOAD = 4.55 V / 284.4 = 16mA
PLOADN = 4.55 V × 16 mA = 72.8 mW
IINT = 35 mA - 16 mA = 19 mA
PBATAN = 13.4 V × 35 mA = 469 mW
PINT = 469 mW - 72.8 mW = 396.2 mW
Ptot = 396.2 mW × 50% + 26.8 mW × (1-50%) = 211.5 mW
Additional examples with various node counts are shown in Table 4.
Table 4. Representative Power Dissipation Analyses
Nodes
2
RLOAD
()
4550
VBAT (V)
13.4
IBATPN
(mA)
2
PPNINT
(mW)
26.8
VCANHN
(V)
4.55
10 910 13.4 2 26.8 4.55
20 455 13.4 2 26.8 4.55
32
284.4
13.4
2
26.8 4.55
2
4550
26.5
2
53 4.55
10 910 26.5 2
53 4.55
20 455 26.5 2
53 4.55
32
284.4
26.5
2
53 4.55
ILOAD
(mA)
1
5
10
16
1
5
10
16
IBATN
(mA)
20
24
29
35
20
24
29
35
IINT (mA)
19
19
19
19
19
19
19
19
PINT
(mW)
263.5
298.9
343.1
396.2
525.5
613.3
723
854.7
Dcycle
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
Ptot
(mW)
145.1
162.8
184.9
211.5
289.2
333.1
388
453.8
By knowing the maximum power dissipation, and the operation ambient temperature, the required thermal resistance without tripping the
thermal protection can be calculated, as shown in Figure 7. Then from Figure 5 or 6, a suitable PCB can be selected.
2001 May 18
16










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