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PDF ( 数据手册 , 数据表 ) M-986-2R2PL

零件编号 M-986-2R2PL
描述 MFC Transceivers
制造商 Clare Inc.
LOGO Clare  Inc. LOGO 


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M-986-2R2PL 数据手册, 描述, 功能
Features
Direct A-Law PCM digital input
2.048 Mb/s clocking
Programmable forward/backward mode
Programmable compelled/direct control
Operates with standard codecs for analog
interfacing
Microprocessor read/write interface
Binary or 2-of-6 data formats
Single- or dual-channel versions
5 volt power
Applications
Test equipment
Trunk adapters
Paging terminals
Traffic recorders
PBXs
Pin Assignments
Block Diagram
M-986-2R2
MFC Transceivers
Description
The M-986-1R2 and -2R2 MFC Transceivers contain
all the logic necessary to transmit and receive CCITT
R2F (forward) and R2B (backward) multifrequency
signals on one 40-pin integrated circuit (IC). M-986-
1R2 is a single-channel version; M-986-2R2 provides
two channels. R1 single and dual multifrequency
transceivers are also available as M-986-1R1 and -
2R1.
Operating with a 20.48 MHz crystal, the M-986 is
capable of providing a direct digital interface to an A-
law-encoded PCM digital input. Each channel can be
connected to an analog source using a coder-decoder
(codec) as shown in the Block Diagram below.
The M-986 can be configured by the customer to
operate with the transmitter and receiver either cou-
pled together or independently, allowing it to handle a
compelled cycle automatically or via command from
the host processor. For the R2 versions of the M-986,
A-law is used for coding/decoding. The M-986 is con-
figured and controlled through an integral coprocessor
port.
Ordering Information
Part #
M-986-1R2P
M-986-1R2PL
M-986-2R2P
M-986-2R2PL
Description
40-pin plastic DIP, Single Channel
44-pin PLCC, Single Channel
40-pin plastic DIP, Dual Channel
44-pin PLCC, Dual Channel
DS-M976-2R2-R3
www.clare.com
1







M-986-2R2PL pdf, 数据表
M-986-2R2
Reset (RS) Timing
tdis(R)
td12
td13
tsu(R)
tw(R)
Parameter
Data bus disable time after RS
Delay time from RSto high-impedance SCLK
Delay time from RSto high-impedance DX1, DX0
Reset (RS) setup time prior to CLKOUT
RS pulse duration
Test Conditions
RL = 825
CL = 100 pF
Min Max Unit
- 75 ns
- 200 ns
- 200 ns
50 - ns
977 - ns
CLKOUT Timing Parameters
tc(C)
tr(C)
tf(C)
td(MCC)
Parameter
CLKOUT cycle time
CLKOUT rise time
CLKOUT fall time
Delay time CLKINto CLKOUT
Test Conditions
195.27
RL = 825
CL = 100 pF
Min
195.31
-
-
25
Nom
195.35
10
8
-
Max Unit
ns
- ns
- ns
60 ns
Transmitter Characteristics
Parameter
FOS Frequency offset
TW Twist
AS Signal amplitude
TS Time skew
Phi Power due to harmonic distortion and
intermodulation
Test Conditions
From nominal
High/low
Per component
Between components
300 to 3400 Hz
Min
-
-
-9.26
-
-
Typ
-
-
-8.86
-
-
Max
±1
±0.5
-8.46
0
-46.5
Unit
Hz
dB
dBm0
ms
dBm0
Reciever Characteristics
Parameter
Test Conditions
Min Max Unit
Ad
And
Fd
TWd
TWnd
T3r
FFd
FTnd
RTnd
Ton
Tint
Tor
Detect amplitude
Per frequency
No-detect amplitude
Per frequency
Detect with frequency offset
From nominal
Detect with twist
Adjacent frequencies
Nonadjacent frequencies
No detect with twist
Third R2F tone reject Relative to highest level frequency
Detect R2B with R2F disturbing
Above lowest level R2B tone
(-12.5 dBm0 max.)
No detect R2F with 2 out-of-band sine waves
Any frequencies from
330 - 1150 Hz and 2130 - 3400 Hz
No detect R2B with 2 out-of-band sine waves
Any frequencies from 1300-3400 Hz
Tone time
Reject
Interrupted tone time
Reject
Operate and release time
-35
-42
±10
±5
±7
±20
-20
13.5
-5
-5
7
7
-5 dBm0
-35 dBm0
- Hz
- dB
- dB
- dB
- dB
- dB
- dBm0
- dBm0
- ms
- ms
- 80
8
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Rev. 3














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M-986-2R2PLMFC TransceiversClare  Inc.
Clare Inc.

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