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零件编号 | CXA1166 | ||
描述 | 8-bit 250 MSPS Flash A/D Converter | ||
制造商 | Sony Corporation | ||
LOGO | |||
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CXA1166K
8-bit 250 MSPS Flash A/D Converter
Description
The CXA1166K is an 8-bit ultrahigh-speed flash
A/D converter IC capable of digitizing analog signals
at a maximum rate of 250 MSPS. The digital I/O
level of this A/D converter is compatible with the
ECL 100K/10KH/10K.
This IC is pin-compatible with the conventional
CXA1076AK/CXA1176K/CXA1176AK, and can
replace the conventional models easily. Compared
with the conventional models, the CXA1166K has a
greatly improved performance because of the new
circuit design and carefully considered layout.
Features
• Differential linearity error: ±0.5 LSB or less
• Integral linearity error: ±0.5 LSB or less
• Built-in integral linearity compensation circuit
• Ultrahigh-speed operation with maximum conver-
sion rate of 250 MSPS
• Low input capacitance: 18pF
• Wide analog input bandwidth: 250MHz (full-scale
input, standard)
• Single power supply: –5.2V
• Low power consumption: 1.4W (Typ.)
• Low error rate
• Good temperature characteristics
• Capable of driving 50Ω loads
68 pin LCC (Ceramic)
Structure
Bipolar silicon monolithic IC
Applications
• Digital oscilloscopes
• Other apparatus requiring ultrahigh-speed A/D
conversion
Pin Configuration (Top View)
Pins without name are NC pins (not connected internally).
AGND
AVEE
VRT
VRTS
AVEE
AVEE
LINV
OR
OR
D0
D0
D1
D1
DVEE
61
62
63
64
65
66
67
68
1
2
3
4
5
6
7
8
9
43 AGND
42 AVEE
41
40 VRB
39 VRBS
38 AVEE
37 AVEE
36
35 CLK
34 CLK
33 MINV
32 D7
31 D7
30 D6
29 D6
28 DVEE
27
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E90406-ST
Electrical Characteristics Measurement Circuit
Integral Linearity Error Measurement Circuit
Differential Linearity Error Measurement Circuit
+V
S2
S1:ON when A<B
S1 S2: ON when A>B
VIN
DVM
–V
DUT
8
CXA1166K
“0”
A<B A>B
Comparator
A8 B8
to to
A1 B1
A0 B0
8
“1 ”
Controller
Buffer
000•••00
to
111•••10
CXA1166K
Sampling Delay Measurement circuit
Aperture Jitter Measurement circuit
60MHz
OSC1
φ:Variable
fr
Amp
VIN
CLK
OSC2
60MHz
ECL
Buffer
8
CXA1166K
Logic
Analizer
1024
samples
Aperture Jitter Measurement Method
0V
VIN –1V
–2V
CLK
∆υ
∆t
VIN
129
t 128
127
126
125
σ (LSB)
CLK Sampling timing fluctuation
( = aperture jitter)
When the distribution of the output codes is σ (unit: LSB) If
the maximum slew rate point is sampled with the clock signal
having the same frequency as that of the analog input signal,
Aperture jitter (Taj) is defined as follows:
Taj = σ/
∆υ
∆t
= σ/ (
256
2
× 2πf )
–8–
CXA1166K
Error rate vs. Conversion rate
10–7
Input frequency = CLK frequency/4–1kHz
16LSB or more error
10–8
Error rate vs. Clock duty cycle
10–7
10–9
10–10
10–8
200 250 300
CLK frequency [MHz]
Input frequency = 125MHz, full-scale
Clock frequency = 250MHz
16LSB or more error
10–9 25 30 35 40 45 50 55 60 65 70
CLK duty cycle [%]
–200
Supply current vs. Temperature characteristics
–250
–300
–350
–50
0 50 100
Tc — Case temperature [°C]
150
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页数 | 28 页 | ||
下载 | [ CXA1166.PDF 数据手册 ] |
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