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DCP010515DP 数据手册 PDF ( Miniature 5V Input/ 1W Isolated UNREGULATED DC/DC CONVERTERS )

零件编号 DCP010515DP
描述 Miniature 5V Input/ 1W Isolated UNREGULATED DC/DC CONVERTERS
制造商 Burr-Brown Corporation
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DCP010515DP 数据手册, 描述, 功能
® DCP0105
DCP0105
DCP0105
Series
Miniature 5V Input, 1W Isolated
UNREGULATED DC/DC CONVERTERS
FEATURES
q STANDARD JEDEC PLASTIC PACKAGE
q MEETS EN55022 CLASS B
q LOW PROFILE: 0.15" (3.8mm)
q SYNCHRONIZABLE
q OUTPUT SHORT CIRCUIT PROTECTION
q THERMAL SHUTDOWN
q STARTS INTO ANY CAPACITIVE LOAD
q FLOATING OUTPUTS
q EFFICIENCY: Up to 75% (at Full Load)
q 1000Vrms ISOLATION
q 400kHz SWITCHING
q 108 MILLION HOURS MTTF
q 5V, ±5V, 12V, ±12V, 15V, ±15V OUTPUTS
q AVAILABLE IN TAPE AND REEL
DESCRIPTION
The DCP0105 family is a series of high efficiency, 5V
input isolated DC/DC converters. In addition to 1W
nominal galvanically isolated output power capability,
the range of DC/DCs are also fully synchronizable.
The devices feature thermal shutdown, and overload
protection is implemented via watchdog circuitry.
Advanced power-on reset techniques give superior
reset performance and the devices will start into any
capacitive load up to full power output.
The DCP0105 family is implemented in standard-
molded IC packaging, giving outlines suitable for high
volume assembly.
APPLICATIONS
q POINT OF USE POWER CONVERSION
q DIGITAL INTERFACE POWER
q GROUND LOOP ELIMINATION
q DATA ACQUISITION
q INDUSTRIAL CONTROL AND
INSTRUMENTATION
q TEST EQUIPMENT
SYNCIN
800kHz
Oscillator
÷2
Reset
Watch-dog/
start-up
Power
Stage
SYNCOUT
VOUT
0V
PSU
Thermal
Shutdown
IBIAS
VS
Power Controller IC
0V
ternational Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1996 Burr-Brown Corporation
PDS-1336G
Printed in U.S.A. May, 1999




DCP010515DP pdf, 数据表
TYPICAL PERFORMANCE CURVES (DCP010505D Specific)
At TA = +25°C, VOUT nominal (VNOM) = ±5V and VS = +5V, unless otherwise noted.
DCP010505D OUTPUT vs INPUT VOLTAGE (75% Load)
5.6
5.4
5.2
5.0
4.8
4.6
+VOUT
4.4 –VOUT
4.2
4.0
4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5
Input Voltage (V)
5.80
5.60
5.40
5.20
5.00
4.80
4.60
4.40
4.20
4.00
0
DCP010505D OUTPUT VOLTAGE vs LOAD
+VOUT
–VOUT
10 20 30 40 50 60 70 80 90 100
Load (%)
DCP010505D LOAD BALANCE (+VOUT Load = 10%)
6
4
+VOUT
–VOUT
2
0
–2
–4
–6
10
40 70
–VOUT Load (% of FL)
100
DCP010505D LOAD BALANCE (+VOUT Load = 100%)
6
4
+VOUT
–VOUT
2
0
–2
–4
–6
10
40 70
–VOUT Load (% of FL)
100
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–40
DCP010505D POWER vs TEMPERATURE
–20 0
20 40 60 80
Temperature (°C)
100
DCP010505D EFFICIENCY vs LOAD
75
70
65
60
55
50
45
40
0
10 20 30 40 50 60 70 80 90 100
Load (%)
®
DCP0105
8


DCP010515DP equivalent, schematic
Most of the dissipated heat comes from input side common
(pin 2). To a lesser extent, the +VOUT pin (pin 6) also
dissipates heat from the package. In the layout shown in
Figure 7, the large copper areas next to pins 2 and 6 will
provide excellent heat dissipation paths.
The tracking in Figure 7, shown in dotted lines, will provide
shielding for the SYNCIN (pin 14) and SYNCOUT (pin 7)
pins if necessary.
As described earlier in the Disable/Enable section of this
data sheet, any additional capacitance to the 25pF internal
capacitor at the SYNCIN pin will affect performance. If there
is the possibility of significant leakage capacitance at the
SYNCIN pin, it can be shielded as shown.
As described earlier in the Synchronization section of this
data sheet, the SYNCOUT pin can be shielded as shown to
minimize noise pick-up in sensitive applications.
dependent on the VIN of the DCP010505. With a VIN of
5.25V, the LP2986 LDO can deliver up to 165mA.
The LP2986 LDO has a very low dropout voltage of typi-
cally less than 180mV, which allows us to deliver 4.75V
guaranteed from a 5VOUT unregulated DC/DC. It also offers
low output flagging and shutdown capability and is supplied
in either MSOP-8 or SO-8 packages ensuring additional
board area is minimal and low profile is maintained.
SIP DC/DC
DCP01xx
+VIN
–VIN
0V
+VOUT
–VOUT
FIGURE 8. PCB Layout for DCP0105 and Competitive SIP
DC/DC.
Bottom View
FIGURE 7. Thermal Management Layout.
LAYOUT FOR DCP0105 AND SIP PRODUCTS
Figure 8 shows a layout to allow the use of a DCP0105 and
a competitive SIP isolated DC/DC converter.
POST REGULATION OF THE DCP010505P USING
THE LP2986 LDO REGULATOR
In digital applications where the load range is wide or
evolving, or the input supply voltage is not well regulated
and 5V±5% or 5V±V10% cannot be guaranteed, it is often
necessary to have a regulated 5V output from the DCP0105.
It is possible to post regulate the 5VOUT DCP0105 and still
guarantee a minimum VOUT of 4.75V. This still gives the
benefits of isolation in reducing the power supply noise to
5V digital circuitry.
By using an ultra-low dropout regulator (e.g., National
Semiconductor’s LP2986IM-5.0) in series with the output of
a 5VOUT DCP0105, it is possible to supply up to 100% load
current (depending on VIN). Figure 9 shows the typical load
current for the post-regulated 5VIN/5VOUT DCP010505. It is
possible with a VIN of 5V to supply 130mA. Because of the
1:1 line regulation of the DCP0105, a 5% change in the input
will result in a 5% change in the output. Therefore, the
amount of current that the LDO can deliver is strongly
5.0
4.8
4.6
4.4
4.2
4.0
3.8
0
VIN = 5V
VIN = 5.25V
VIN = 4.75V
50 100
IOUT (mA)
150
200
FIGURE 9. DCP010505P AND LP2986 Regulator.
DCP01 AND LP2986 APPLICATION CIRCUIT
Figure 10 shows the LP2986 in series with the DCP010505
output. The 2.2µF capacitor on the input of the LP2986 and
the 4.7µF capacitor on the output are the minimum recom-
mended for good ripple reduction. Pin 7 on the LP2986 flags
an error by going LOW if the output drops 5% below
nominal.
®
DCP0105
16



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