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PDF ( 数据手册 , 数据表 ) DAC8412

零件编号 DAC8412
描述 12-Bit DAC Voltage Output
制造商 Analog Devices
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DAC8412 数据手册, 描述, 功能
Data Sheet
FEATURES
+5 V to ±15 V operation
Unipolar or bipolar operation
True voltage output
Double-buffered inputs
Reset to minimum (DAC8413) or center scale (DAC8412)
Fast bus access time
Readback
APPLICATIONS
Automatic test equipment
Digitally controlled calibration
Servo controls
Process control equipment
GENERAL DESCRIPTION
The DAC8412/DAC8413 are quad, 12-bit voltage output
DACs with readback capability. Built using a complementary
BiCMOS process, these monolithic DACs offer the user very
high package density.
Output voltage swing is set by the two reference inputs VREFH
and VREFL. By setting the VREFL input to 0 V and VREFH to a
positive voltage, the DAC provides a unipolar positive output
range. A similar configuration with VREFH at 0 V and VREFL at a
negative voltage provides a unipolar negative output range.
Bipolar outputs are configured by connecting both VREFH and
VREFL to nonzero voltages. This method of setting output voltage
range has advantages over other bipolar offsetting methods
because it is not dependent on internal and external resistors
with different temperature coefficients.
Digital controls allow the user to load or read back data from any
DAC, load any DAC, and transfer data to all DACs at one time.
An active low RESET loads all DAC output registers to midscale
for the DAC8412 and zero scale for the DAC8413.
The DAC8412/DAC8413 are available in 28-lead plastic DIP,
28-lead ceramic DIP, 28-lead PLCC, and 28-lead LCC packages.
Quad, 12-Bit DAC
Voltage Output with Readback
DAC8412/DAC8413
FUNCTIONAL BLOCK DIAGRAM
VLOGIC
VDD VREFH
DATA 12
I/O
DGND
I/O
PORT
A0
A1
CONTROL
R/W
LOGIC
CS
INPUT
REG A
INPUT
REG B
INPUT
REG C
INPUT
REG D
OUTPUT
REG A
OUTPUT
REG B
OUTPUT
REG C
OUTPUT
REG D
DAC A
DAC B
DAC C
DAC D
RESET
LDAC
Figure 1.
VREFL VSS
VOUTA
VOUTB
VOUTC
VOUTD
They can be operated from a wide variety of supply and reference
voltages with supplies ranging from single +5 V to ±15 V, and
references from +2.5 V to ±10 V. Power dissipation is less than
330 mW with ±15 V supplies and only 60 mW with a +5 V supply.
For MIL-STD-883 applications, contact your local Analog
Devices, Inc. sales office for the DAC8412/DAC8413/883 data
sheet, which specifies operation over the −55°C to +125°C
temperature range. All 883 parts are also available on Standard
Military Drawings 5962-91 76401MXA through 76404M3A.
0.500
0.375
0.250
+25°C
+125°C
0.125
0
–0.125
–55°C
–0.250
–0.375
–0.500
0
VDD = +15V
VSS = –15V
VREFH = +10V
VREFL = –10V
TA = –55°C, +25°C, +125°C
512 1024 1536 2046 2548 2560
DIGITAL INPUT CODE (Decimal)
3072
Figure 2. INL vs. Code Over Temperature
4096
Rev. G
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2000–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com







DAC8412 pdf, 数据表
DAC8412/DAC8413
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VREFH 1
28 VREFL
VOUTB 2
27 VOUTC
VOUTA 3
26 VOUTD
VSS 4
25 VDD
DGND 5 DAC8412/ 24 VLOGIC
RESET 6 DAC8413 23 CS
LDAC 7 TOP VIEW 22 A0
DB0 (LSB) 8 (Not to Scale) 21 A1
DB1 9
20 R/W
DB2 10
19 DB11 (MSB)
DB3 11
18 DB10
DB4 12
17 DB9
DB5 13
16 DB8
DB6 14
15 DB7
4 3 2 1 28 27 26
DGND 5
RESET 6
LDAC 7
DB0 (LSB) 8
DB1 9
DB2 10
DB3 11
PIN 1
INDENTFIER
DAC8412/
DAC8413
TOP VIEW
(Not to Scale)
25 VDD
24 VLOGIC
23 CS
22 A0
21 A1
20 R/W
19 DB11 (MSB)
12 13 14 15 16 17 18
Figure 7. PDIP/CERDIP
Figure 8. PLCC
DGND 5
RESET 6
LDAC 7
DB0 (LSB) 8
DB1 9
DB2 10
DB3 11
4 3 2 1 28 27 26
DAC8412/
DAC8413
TOP VIEW
(Not to Scale)
25 VDD
24 VLOGIC
23 CS
22 A0
21 A1
20 R/W
19 DB11 (MSB)
12 13 14 15 16 17 18
Figure 9. LCC
Table 5. Pin Function Descriptions
Pin Number Mnemonic Description
1
VREFH
High-Side DAC Reference Input.
2
VOUTB
DAC B Output.
3
VOUTA
DAC A Output.
4 VSS Lower Rail Power Supply.
5
DGND
Digital Ground.
6
RESET
Reset Input and Output Registers to all 0s, Enabled at Active Low.
7
LDAC
Load Data to DAC, Enabled at Active Low.
8 DB0 Data Bit 0, LSB.
9 DB1 Data Bit 1.
10 DB2 Data Bit 2.
11 DB3 Data Bit 3.
12 DB4 Data Bit 4.
13 DB5 Data Bit 5.
14 DB6 Data Bit 6.
15 DB7 Data Bit 7.
16 DB8 Data Bit 8.
17 DB9 Data Bit 9.
18
DB10
Data Bit 10.
19
DB11
Data Bit 11, MSB.
20 R/W Active Low to Write Data to DAC. Active high to readback previous data at data bit pins with VLOGIC connected to 5 V.
21 A1 Address Bit 1.
22 A0 Address Bit 0.
23 CS Chip Select, Enabled at Active Low.
24
VLOGIC
Voltage Supply for Readback Function. Can be open circuit if not used.
25 VDD Upper Rail Power Supply.
26
VOUTD
DAC D Output.
27
VOUTC
DAC C Output.
28 VREFL Low-Side DAC Reference Input.
Rev. G | Page 8 of 20







DAC8412 equivalent, schematic
DAC8412/DAC8413
Data Sheet
CS
A0
A1
R/W
DB11..DB0
VLOGIC
READBACK
DATAOUT_DB11
VREFH
VDD VSS
RDDACA WRDB0
WRDB1
WRDACA WRDB2
DAC A
RDDACB
WRDB3
WRDB4
DAC B
WRDACB WRDB5
INPUT
OUTPUT
REGISTER WRDB6 REGISTER
RDDACC
WRDB7
WRDACC WRDB8
WRDB9
DAC C
RDDACD WRDB10
WRDB11
WRDACD
DAC D
READOUTBAR
READBACKDATAIN_DB11
READBACKDATAIN_DB10
VOUTA
VOUTB
VOUTC
VOUTD
VREFL
LDAC
RESET
READOUT
DGND
Figure 38. Simplified I/O Logic Diagram
Careful attention to grounding is important for accurate
operation of the DAC8412. This is not because the DAC8412 is
more sensitive than other 12-bit DACs, but because with four
outputs and two references, there is greater potential for ground
loops. Because the DAC8412 has no analog ground, the ground
must be specified with respect to the reference.
REFERENCE CONFIGURATIONS
Output voltage ranges can be configured as either unipolar or
bipolar, and within these choices, a wide variety of options
exists. The unipolar configuration can be either positive or
negative voltage output, and the bipolar configuration can be
either symmetrical or nonsymmetrical.
+15V
+
+15V
INPUT
OUTPUT
REF10
TRIM
10k
OP400
VREFH
0.2µF
VREFL
+10V OPERATION
VDD
DAC8412
OR
DAC8413
VSS
0.1µF
//10µF
–15V
Figure 39. Unipolar +10 V Operation
+15V
39k
+15V
BALANCE
100k
GAIN
100k
6.2
AD688 FOR ±10V
AD588 FOR ±5V
0.2µF
6.2
0.2µF
VDD
VREFH
DAC8412
OR
DAC8413
VREFL
VSS
0.1µF
//10µF
1µF
–15V
±5 OR ±10V OPERATION
Figure 40. Symmetrical Bipolar Operation
Figure 40 (symmetrical bipolar operation) shows the DAC8412
configured for ±10 V operation. See the AD688 data sheet for a
full explanation of reference operation. Adjustments may not be
required for many applications since the AD688 is a very high
accuracy reference. However, if additional adjustments are
required, adjust the DAC8412 full scale first. Begin by loading
the digital full-scale code (0xFFF), and then adjust the gain
adjust potentiometer to attain a DAC output voltage of 9.9976 V.
Then, adjust the balance adjust to set the center-scale output
voltage to 0.000 V.
Rev. G | Page 16 of 20










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