DataSheet8.cn


PDF ( 数据手册 , 数据表 ) DAC8222FP

零件编号 DAC8222FP
描述 Dual 12-Bit Double-Buffered Multiplying CMOS D/A Converter
制造商 Analog Devices
LOGO Analog Devices LOGO 


1 Page

No Preview Available !

DAC8222FP 数据手册, 描述, 功能
a
Dual 12-Bit Double-Buffered
Multiplying CMOS D/A Converter
DAC8222
FEATURES
Two Matched 12-Bit DACs on One Chip
Direct Parallel Load of All 12 Bits for High Data
Throughput
Double-Buffered Digital Inputs
12-Bit Endpoint Linearity (؎1/2 LSB) Over Temperature
+5 V to +15 V Single Supply Operation
DACs Matched to 1% Max
Four-Quadrant Multiplication
Improved ESD Resistance
Packaged in a Narrow 0.3" 24-Lead DIP and 0.3"
24- Lead SOL Package
Available in Die Form
APPLICATIONS
Automatic Test Equipment
Robotics/Process Control/Automation
Digital Gain/Attenuation Control
Ideal for Battery-Operated Equipment
FUNCTIONAL DIAGRAM
GENERAL DESCRIPTION
The DAC8222 is a dual 12-bit, double-buffered, CMOS digital-
to-analog converter. It has a 12-bit wide data port that allows a
12-bit word to be loaded directly. This achieves faster through-
put time in stand-alone systems or when interfacing to a 16-bit
processor. A common 12-bit input TTL/CMOS compatible
data port is used to load the 12-bit word into either of the two
DACs. This port, whose data loading is similar to that of a RAM’s
write cycle, interfaces directly with most 12-bit and 16-bit bus
systems. (See DAC8248 for a complete 8-bit data bus interface
product.) A common bus allows the DAC8222 to be packaged
in a narrow 24-lead 0.3" DIP and save PCB space.
The DAC is controlled with two signals, WR and LDAC. With
logic low at these inputs, the DAC registers become transparent.
This allows direct unbuffered data to flow directly to either
DAC output selected by DAC A/DAC B. Also, the DAC’s
double-buffered digital inputs will allow both DACs to be
simultaneously updated.
DAC8222’s monolithic construction offers excellent DAC-to-
DAC matching and tracking over the full operating tempera-
ture range. The chip consists of two thin-film R-2R resistor
ladder networks, four 12-bit registers, and DAC control logic
circuitry. The device has separate reference-input and feedback
resistors for each DAC and operates on a single supply from
+5 V to +15 V. Maximum power dissipation at +5 V using
zero or VDD logic levels is less than 0.5 mW.
The DAC8222 is manufactured with highly stable thin-film re-
sistors on an advanced oxide-isolated, silicon-gate, CMOS
technology. Improved latch-up resistant design eliminates the
need for external protective Schottky diodes.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000







DAC8222FP pdf, 数据表
DAC8222
between IOUT and AGND terminals be as close to zero as practi-
cal in order to keep DAC errors to a minimum. This is normally
done by connecting AGND to the noninverting input of an op
amp and IOUT to the inverting input. The DAC’s internal resis-
tor (RFB) can be used for the feedback resistor by connecting the
op amp’s output directly to the DAC’s RFB terminal. The op
amp also provides the current-to-voltage conversion for the
DAC’s output current. The output voltage is dependent on the
DAC’s digital input code and VREF, and is given by:
VOUT = –VREF × D/4096
where D is the digital input code integer number that is between
0 and 4095.
The DAC’s input resistance, VREF (Figure 19), is always equal
to a constant value, R. This means that VREF can be driven by a
reference voltage or current, ac or dc (positive or negative). It is
recommended that a low-temperature-coefficient external RFB
resistor be used if a current source is employed.
The DAC’s output capacitance (COUT) is code dependent and
varies from 90 pF (all digital inputs low) to 120 pF (all digital
inputs high).
Figure 19 shows a transistor switch in series with the R-2R lad-
der terminating resistor and RFB resistor. They were designed
into the DAC to binarily match the ladder leg switches and im-
prove power supply rejection and gain error temperature coeffi-
cient. The gates of these transistor switches are connected to
VDD, so that an “open-circuit” exists when VDD is not applied.
This means that an op amp’s output voltage will go to either
“rail” if powered up before the DAC. Also, RFB resistance can-
not be measured without VDD being applied.
Figure 21. Digital Input Structure For One Bit
DIGITAL SECTION
The DAC8222’s digital inputs are CMOS inserters. They were
designed to convert TTL and CMOS input logic levels into
voltage levels to drive the internal circuitry. The digital inputs
are TTL compatible at VDD = +5 V and CMOS compatible at
VDD = +15 V. The DAC8222 can use +5 V CMOS logic levels
with VDD = +12 V; however, supply current will rise to approxi-
mately 5 mA–6 mA.
Figure 21 shows the DAC’s digital input register structure for
one bit. This circuit drives the DAC register. Digital controls φ
and φ shown are generated from DAC A/DAC B and WR con-
trol signals.
As shown in Figure 21, these inputs are electrostatic-discharge
protected with two internal distributed diodes; they are con-
nected between VDD and DGND. Each digital input has a typi-
cal input current of less than 1 nA.
When the digital inputs are in the region of +1.2 V to +2.8 V
(peaking at +1.8 V) using a +5 V power supply or in the region
of +1.7 V to +12 V (peaking at +3.9 V) with a +15 V power
supply, the input register transistors are operating in their linear
region and draw current from the power supply. It is therefore,
recommended that the digital input voltages be as close to the
supply rails (VDD and DGND) as is practically possible to keep
supply currents at a minimum. The DAC8222 may be operated
with any supply voltage between the range of +5 V to +15 V.
INTERFACE CONTROL LOGIC
The DAC8222’s input control logic circuitry is shown in Figure
22. Note how the WR signal is used in conjunction with DAC
A/ DAC B to load data into either input register. LDAC loads
data from the input registers to the DAC register; the DAC’s
analog output voltage is determined by the data contained in
each DAC register.
The truth table for the DAC registers is shown in the Mode Se-
lection Table. Note how the input register is transparent when
WR is low and LDAC is high, and that the DAC register is
transparent when WR is high and LDAC is low (LDAC updates
the DAC’s analog output voltage). The DAC is transparent
from input to output when WR and LDAC are both low, and
the DAC is latched (input and output is not being updated)
when WR and LDAC are both high.
Figure 22. Input Control Logic
–8–
REV. C














页数 15 页
下载[ DAC8222FP.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
DAC8222FPDual 12-Bit Double-Buffered Multiplying CMOS D/A ConverterAnalog Devices
Analog Devices
DAC8222FSDual 12-Bit Double-Buffered Multiplying CMOS D/A ConverterAnalog Devices
Analog Devices
DAC8222FWDual 12-Bit Double-Buffered Multiplying CMOS D/A ConverterAnalog Devices
Analog Devices

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap