DataSheet8.cn


PDF ( 数据手册 , 数据表 ) DAC811AH

零件编号 DAC811AH
描述 Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER
制造商 Burr-Brown Corporation
LOGO Burr-Brown Corporation LOGO 


1 Page

No Preview Available !

DAC811AH 数据手册, 描述, 功能
® DAC811
For most current data sheet and other product
information, visit www.burr-brown.com
Microprocessor-Compatible
12-BIT DIGITAL-TO-ANALOG CONVERTER
FEATURES
q SINGLE INTEGRATED CIRCUIT CHIP
q MICROCOMPUTER INTERFACE:
DOUBLE-BUFFERED LATCH
q VOLTAGE OUTPUT: ±10V, ±5V, +10V
q MONOTONICITY GUARANTEED OVER
TEMPERATURE
q ±1/2LSB MAXIMUM NONLINEARITY OVER
TEMPERATURE
q GUARANTEED SPECIFICATIONS AT ±12V
AND ±15V SUPPLIES
q TTL/5V CMOS-COMPATIBLE LOGIC
INPUTS
DESCRIPTION
The DAC811 is a complete, single-chip integrated-
circuit, microprocessor-compatible, 12-bit digital-to-
analog converter. The chip combines a precision volt-
age reference, microcomputer interface logic, and
double-buffered latch, in a 12-bit D/A converter with
a voltage output amplifier. Fast current switches and a
laser-trimmed thin-film resistor network provide a
highly accurate and fast D/A converter.
Microcomputer interfacing is facilitated by a double-
buffered latch. The input latch is divided into three
4-bit nibbles to permit interfacing to 4-, 8-, 12-, or
16-bit buses and to handle right-or left-justified data.
The 12-bit data in the input latches is transferred to the
D/A latch to hold the output value.
Input gating logic is designed so that loading the last
nibble or byte of data can be accomplished simulta-
neously with the transfer of data (previously stored in
adjacent latches) from adjacent input latches to the
D/A latch. This feature avoids spurious analog output
values while using an interface technique that saves
computer instructions.
The DAC811 is laser trimmed at the wafer level and
is specified to ±1/4LSB maximum linearity error (B,
K, and S grades) at 25°C and ±1/2LSB maximum over
the temperature range. All grades are guaranteed mono-
tonic over the specification temperature range.
The DAC811 is available in six performance grades
and three package types. DAC811J and K are speci-
fied over the temperature ranges of 0°C to +70°C;
DAC811A and B are specified over –25°C to +85°C;
DAC811R and S are specified over –55°C to +125°C.
DAC811J and K are packaged in a reliable 28-pin
plastic DIP or plastic SOIC package, while DAC811A,
B, R and S are available in a 28-pin 0.6" wide dual-
inline hermetically sealed ceramic side-brazed pack-
age (H package).
4 MSBs
4 LSBs
Input Latch Input Latch Input Latch
D/A Latch
12-Bit D/A Converter
Voltage Reference
RBPO
BPO
SJ
RF 10V
RF
VOUT
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1983 Burr-Brown Corporation
PDS1-503K
DAC811Printed in U.S.A. January, 2000
®







DAC811AH pdf, 数据表
8-BIT INTERFACE
The control logic of DAC811 permits interfacing to right-
justified data formats, as illustrated in Figure 9. When a
12-bit D/A converter is loaded from an 8-bit bus, two bytes
of data are required. Figures 10 and 11 show an addressing
scheme for right-justified and left-justified data respectively.
The base address is decoded from the high-order address
bits. A0 and A1 address the appropriate latches. Note that
adjacent addresses are used. For the right-justified case,
X1016 loads the 8LSBs, and X0116 loads the 4MSBs and
simultaneously transfers input latch data to the D/A latch.
Addresses X0016 and X1116 are not used.
Left-justified data is handled in a similar manner, shown in
Figure 11. The DAC811 still occupies two adjacent loca-
tions in the microcomputer's memory map.
DB0
DB1
DB2
DB3
WR
AN
A2
A1
A0
16 D0
14 D4
10 D8
17 D1
13 D5
9 D9
18 D2
12 D6
8 D10
19 D3
11 D7
7 D11
2 WR
Base
Address
Decoder
CS
(Chip
Select)
1 EN
3 A1
2 A0
1/2
74LS139
Y3 7
Y2 6
Y1 5
Y0 4
3 LDAC
4 NA
5 NB
6 NC
FIGURE 8. Addressing and Control for 4-Bit Microcom-
puter Interface.
X X X X D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
a. Right-Justified
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X
b. Left-Justified
FIGURE 9. 12-Bit Data Format for 8-Bit Systems.
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
WR
A15
A2
A1
A0
Base
Address
Decoder
CS
16 D0
10 D8
17 D1
9 D9
18 D2
8 D10
19 D3
7 D11
14 D4
13 D5
12 D6
11 D7
2 WR
3 LDAC
4 NA
5 NB
6 NC
FIGURE 10. Right-Justified Data Bus Interface.
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
WR
A15
A2
A1
A0
Base
Address
Decoder
CS
14 D4
13 D5
12 D6
11 D7
10 D8
16 D0
9 D9
17 D1
8 D10
18 D2
7 D11
19 D3
2 WR
3 LDAC
4 NA
5 NB
6 NC
FIGURE 11. Left-Justified Data Bus Interface.
®
DAC811
8














页数 9 页
下载[ DAC811AH.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
DAC811AHMicroprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTERBurr-Brown Corporation
Burr-Brown Corporation

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap