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PDF ( 数据手册 , 数据表 ) DAC7741Y

零件编号 DAC7741Y
描述 16-Bit/ Single Channel DIGITAL-TO-ANALOG CONVERTER With Internal Reference and Parallel Interface
制造商 Burr-Brown Corporation
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DAC7741Y 数据手册, 描述, 功能
DAC7741
DAC7741
SBAS248A – DECEMBER 2001 – REVISED JULY 2003
16-Bit, Single Channel
DIGITAL-TO-ANALOG CONVERTER
With Internal Reference and Parallel Interface
FEATURES
q LOW POWER: 150mW MAXIMUM
q +10V INTERNAL REFERENCE
q UNIPOLAR OR BIPOLAR OPERATION
q SETTLING TIME: 5µs to ±0.003% FSR
q 16-BIT MONOTONICITY, –40°C TO +85°C
q ±10V, ±5V OR +10V CONFIGURABLE VOLTAGE
OUTPUT
q RESET TO MIN-SCALE OR MID-SCALE
q DOUBLE-BUFFERED DATA INPUT
q INPUT REGISTER DATA READBACK
q SMALL LQFP-48 PACKAGE
APPLICATIONS
q PROCESS CONTROL
q ATE PIN ELECTRONICS
q CLOSED-LOOP SERVO CONTROL
q MOTOR CONTROL
q DATA ACQUISITION SYSTEMS
DESCRIPTION
The DAC7741 is a 16-bit Digital-to-Analog Converter (DAC)
which provides 16 bits of monotonic performance over the
specified operating temperature range and offers a +10V,
low-drift internal reference. Designed for automatic test equip-
ment and industrial process control applications, the DAC7741
output swing can be configured in a ±10V, ±5V, or +10V
range. The flexibility of the output configuration allows the
DAC7741 to provide both unipolar and bipolar operation by
pin strapping. The DAC7741 includes a high-speed output
amplifier with a maximum settling time of 5µs to ±0.003%
FSR for a 20V full-scale change and only consumes 100mW
(typical) of power.
The DAC7741 features a standard 16-bit parallel interface with
double buffering to allow asynchronous updates of the analog
output and data read-back to support data integrity verification
prior to an update. A user-programmable reset control allows
the DAC output to reset to min-scale (0000H) or mid-scale
(8000H) overriding the DAC register values. The DAC7741 is
available in a LQFP-48 package and four performance grades
specified to operate from 0°C to +70°C and 40°C to +85°C.
VDD VSS VCC
REFADJ REFOUT REFIN
VREF
REFEN
CS
R/W
RST
RSTSEL
+10V
Reference
Control
Logic
Buffer
ROFFSET
RFB2
RFB1
Data I/O
16
I/O
Buffer
Input
Register
DAC
Register
DAC
SJ
VOUT
AGND DGND
LDAC
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
Copyright © 2001-2003, Texas Instruments Incorporated







DAC7741Y pdf, 数据表
TYPICAL CHARACTERISTICS (Cont.)
TA = +25°C (unless otherwise noted)
VCC SUPPLY CURRENT vs DIGITAL INPUT CODE
3.4
Bipolar Configuration: VOUT = 10V to +10V
3.3 External Reference, REFEN = 5V, TA = 25°C
3.2
3.1
3.0
2.9
2.8
2.7
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
1.50
VSS SUPPLY CURRENT vs DIGITAL INPUT CODE
1.75
2.00
2.25
2.50
2.75
Bipolar Configuration: VOUT = 10V to +10V
TA = 25°C
0000H 2000H 4000H 6000H 8000H A000H C000H E000H FFFFH
Digital Input Code
6
5
4
3
ICC
2
1
0
1
2
3
4
40
SUPPLY CURRENT vs TEMPERATURE
Load Current Excluded, VCC = +15V, VSS = 15V
Bipolar VOUT Configuration: 10V to +10V
ISS
15 10 35 60
Temperature (°C)
85
1000
800
SUPPLY CURRENT vs LOGIC INPUT VOLTAGE
TA = 25°C, Transition
Shown for One Data
Input (CS = 5V, R/W = 0)
600
400
200
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VLOGIC (V)
HISTOGRAM OF VCC CURRENT CONSUMPTION
100
Bipolar Output Configuration
90 Internal Reference Enabled
80 Code = 5555H
70
60
50
40
30
20
10
0
3.000
3.500
4.000
4.500
5.000
ICC (mA)
HISTOGRAM OF VSS CURRENT CONSUMPTION
100
Bipolar Output Configuration
90 Internal Reference Enabled
80 Code = 5555H
70
60
50
40
30
20
10
0
3.50
3.00
2.50
2.00
1.50
ISS (mA)
8 DAC7741
www.ti.com
SBAS248A







DAC7741Y equivalent, schematic
OFFSET ADJUSTMENT
Offset adjustment is accomplished by introducing a small
current into the summing junction (SJ) of the DAC7741. The
voltage at SJ, or VSJ, is dependent on the output configura-
tion of the DAC7741. See Table IV for the required pin
strapping for a given configuration and the nominal values of
VSJ for each output range.
REFERENCE
OUTPUT
PIN STRAPPING
CONFIGURATION CONFIGURATION ROFFSET RFB1 RFB2
VSJ(1)
Internal
Reference
0V to +10V
10V to +10V
5V to +5V
to VREF to VOUT to VOUT +5V
NC NC to VOUT +3.333V
to AGND to VOUT to VOUT +1.666V
External
Reference
0V to VREF
VREF to VREF
VREF/2 to VREF/2
to VREF to VOUT to VOUT
NC NC to VOUT
to AGND to VOUT to VOUT
VREF/2
VREF/3
VREF/6
NOTE: (1) Voltage measured at VSJ for a given configuration.
TABLE IV. Nominal VSJ vs. VOUT and Reference Configuration.
The current level required to adjust the DAC7741 offset can
be created by using a potentiometer divider as shown in
Figure 7. Another alternative is to use a unipolar DAC in
order to apply a voltage, VOADJ, to the resistor RS. A ±2uA
current range applied to SJ will ensure offset adjustment
coverage of the ±0.1% maximum offset specification of the
DAC7741.
When in a unipolar configuration (VSJ = 5V), only a single
resistor, RS, is needed for symmetrical offset adjustment with
a 0V to 10V VOADJ range. When in one of the two bipolar
configurations, VSJ is either +3.333v (±10V range) or +1.666V
(±5V range), and circuit values chosen to match those given
in Table V will provide symmetrical offset adjust. Please refer
to Figure 7 for component configuration.
than 100k) as shown in Figure 7. Since the input imped-
ance of REFADJ is typically 50k, the smaller the resistance
of the potentiometer, the more linear the adjustment will be.
A 10kpotentiometer is suggested if linearity of the refer-
ence adjustment is of concern.
OFFSET ADJUST RANGE
50
typ 10V to +10V VOUT
Configuration
25 min (75% of typ)
typ
0
min (75% of typ)
0V to 10V and 5V to +5V
25 VOUT Configuration
50
2
1 0
1
ISJ (µA)
2
FIGURE 8. Offset Adjustment Transfer Characteristic.
When the DAC7741 internal reference is not used, gain
adjustments can be made via trimming the external refer-
ence applied to the DAC at REFIN. This can be accomplished
through using a potentiometer, unipolar DAC, or other means
of precision voltage adjustment to control the voltage pre-
sented to the DAC7741 by the external reference. Figure 9
and Table VI summarize the range of adjustment of the
internal reference via REFADJ.
OUTPUT
RPOT2
CONFIGURATION
R1
0V to +10V
10V to +10V
5V to +5V
10K 0
10K 5K
10K 20K
RS
2.5M
1.5M
1M
ISJ
RANGE
±2µA
±2.2µA
±1.7µA
NOMINAL
OFFSET
ADJUSTMENT
±25mV
±55mV
±21mV
TABLE V. Recommended External Component Values for
Symmetrical Offset Adjustment (VREF = 10V).
Figure 8 illustrates the typical and minimum offset adjustment
ranges provided by forcing a current at SJ for a given output
voltage configuration.
GAIN ADJUSTMENT
When using the internal reference of the DAC7741, gain
adjustment is performed by adjusting the internal refer-
ence voltage via the reference adjust pin, REFADJ. The
effect of a reference voltage change on the gain of the
DAC output can be seen in the generic equation (for
unipolar configuration):
VOUT = VREFIN (N/65536)
where N is represented in decimal format and ranges from 0
to 65535.
REFADJ can be driven by a low impedance voltage source
such as a unipolar, 0V to +10V DAC or a potentiometer (less
REFOUT ADJUST RANGE
40
30
Typical REFOUT
Adjustment Range
20
10
0 Minimum REFOUT
Adjustment Range
10
20
30
40
0246
REFADJ (V)
8
10
FIGURE 9. Internal Reference Adjustment Transfer Charac-
teristic.
VOLTAGE AT REFADJ
REFADJ = 0V
REFADJ = 5V or NC(1)
REFADJ = 10V
REFOUT VOLTAGE
10V + 25mV (min)
10V
10V 25mV (max)
NOTE: "NC" is "Not Connected"
TABLE VI. Minimum Internal Reference Adjustment Range.
16 DAC7741
www.ti.com
SBAS248A










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