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PDF ( 数据手册 , 数据表 ) HPC26003

零件编号 HPC26003
描述 High-Performance microControllers
制造商 National Semiconductor
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HPC26003 数据手册, 描述, 功能
PRELIMINARY
April 1994
HPC16083 HPC26083 HPC36083 HPC46083
HPC16003 HPC26003 HPC36003 HPC46003
High-Performance microControllers
General Description
The HPC16083 and HPC16003 are members of the HPCTM
family of High Performance microControllers Each member
of the family has the same core CPU with a unique memory
and I O configuration to suit specific applications The
HPC16083 has 8k bytes of on-chip ROM The HPC16003
has no on-chip ROM and is intended for use with external
direct memory Each part is fabricated in National’s ad-
vanced microCMOS technology This process combined
with an advanced architecture provides fast flexible I O
control efficient data manipulation and high speed compu-
tation
The HPC devices are complete microcomputers on a single
chip All system timing internal logic ROM RAM and I O
are provided on the chip to produce a cost effective solution
for high performance applications On-chip functions such
as UART up to eight 16-bit timers with 4 input capture regis-
ters vectored interrupts WATCHDOGTM logic and MICRO-
WIRE PLUSTM provide a high level of system integration
The ability to address up to 64k bytes of external memory
enables the HPC to be used in powerful applications typical-
ly performed by microprocessors and expensive peripheral
chips The term ‘‘HPC16083’’ is used throughout this data-
sheet to refer to the HPC16083 and HPC16003 devices un-
less otherwise specified
The microCMOS process results in very low current drain
and enables the user to select the optimum speed power
product for his system The IDLE and HALT modes provide
further current savings The HPC is available in 68-pin
PLCC LDCC PGA and 80-Pin PQFP packages
Features
Y HPC family core features
16-bit architecture both byte and word
16-bit data bus ALU and registers
64k bytes of external direct memory addressing
FAST 200 ns for fastest instruction when using
20 0 MHz clock 134 ns at 30 MHz
High code efficiency most instructions are single
byte
16 x 16 multiply and 32 x 16 divide
Eight vectored interrupt sources
Four 16-bit timer counters with 4 synchronous out-
puts and WATCHDOG logic
MICROWIRE PLUS serial I O interface
CMOS very low power with two power save modes
IDLE and HALT
Y UART full duplex programmable baud rate
Y Four additional 16-bit timer counters with pulse width
modulated outputs
Y Four input capture registers
Y 52 general purpose I O lines (memory mapped)
Y 8k bytes of ROM 256 bytes of RAM on chip
Y ROMless version available (HPC16003)
Y Commercial (0 C to a70 C) industrial (b40 C to
a85 C) automotive (b40 C to a105 C) and military
(b55 C to a125 C) temperature ranges
For applications requiring more RAM and ROM see
HPC16064 data sheet
Block Diagram (HPC16083 with 8k ROM shown)
Series 32000 TapePak and TRI-STATE are registered trademarks of National Semiconductor Corporation
MOLETM HPCTM COPSTM MICROWIRE PLUSTM and WATCHDOGTM are trademarks of National Semiconductor Corporation
UNIX is a registered trademarks of AT T Bell Laboratories
VAXTM is a trademark of Digital Equipment Corporation
IBM and PC AT are registered trademarks of International Business Machines Corporation
SUN is a registered trademark of Sun Microsystems
SunOSTM is a trademark of Sun Microsystems
C1995 National Semiconductor Corporation TL DD 8801
TL DD 8801 – 1
RRD-B30M105 Printed in U S A







HPC26003 pdf, 数据表
Timing Waveforms (Continued)
FIGURE 7 Hold Mode Timing
TL DD 8801 – 6
FIGURE 8 MICROWIRE Setup Hold Timing
TL DD 8801 – 37
FIGURE 9 UPI Read Timing
TL DD 8801 – 9
FIGURE 10 UPI Write Timing
8
TL DD 8801 – 10







HPC26003 equivalent, schematic
Operating Modes
To offer the user a variety of I O and expanded memory
options the HPC16083 has four operating modes The
ROMless HPC16003 has one mode of operation The vari-
ous modes of operation are determined by the state of both
the EXM pin and the EA bit in the PSW register The state of
the EXM pin determines whether on-chip ROM will be ac-
cessed or external memory will be accessed within the ad-
dress range of the on-chip ROM The on-chip ROM range of
the HPC16083 is E000 to FFFF (8k bytes) The HPC16003
has no on-chip ROM and is intended for use with external
memory for program storage A logic ‘‘0’’ state on the EXM
pin will cause the HPC device to address on-chip ROM
when the Program Counter (PC) contains addresses within
the on-chip ROM address range A logic ‘‘1’’ state on the
EXM pin will cause the HPC device to address memory that
is external to the HPC when the PC contains on-chip ROM
addresses The EXM pin should always be pulled high (logic
‘‘1’’) on the HPC16003 because no on-chip ROM is avail-
able The function of the EA bit is to determine the legal
addressing range of the HPC device A logic ‘‘0’’ state in the
EA bit of the PSW register does two things addresses are
limited to the on-chip ROM range and on-chip RAM and
Register range and the ‘‘illegal address detection’’ feature
of the WATCHDOG logic is engaged A logic ‘‘1’’ in the EA
bit enables accesses to be made anywhere within the 64k
byte address range and the ‘‘illegal address detection’’ fea-
ture of the WATCHDOG logic is disabled The EA bit should
be set to ‘‘1’’ by software when using the HPC16003 to
disable the ‘‘illegal address detection’’ feature of WATCH-
DOG
All HPC devices can be used with external memory Exter-
nal memory may be any combination of RAM and ROM
Both 8-bit and 16-bit external data bus modes are available
Upon entering an operating mode in which external memory
is used port A becomes the Address Data bus Four pins of
port B become the control lines ALE RD WR and HBE The
High Byte Enable pin (HBE) is used in 16-bit mode to select
high order memory bytes The RD and WR signals are only
generated if the selected address is off-chip The 8-bit mode
is selected by pulling HBE high at reset If HBE is left float-
ing or connected to a memory device chip select at reset
the 16-bit mode is entered The following sections describe
the operating modes of the HPC16083 and HPC16003
Note The HPC devices use 16-bit words for stack memory Therefore
when using the 8-bit mode User’s Stack must be in internal RAM
HPC16083 Operating Modes
SINGLE CHIP NORMAL MODE
In this mode the HPC16083 functions as a self-contained
microcomputer (see Figure 15 ) with all memory (RAM and
ROM) on-chip It can address internal memory only consist-
ing of 8k bytes of ROM (E000 to FFFF) and 256 bytes of on-
chip RAM and registers (0000 to 01FF) The ‘‘illegal address
detection’’ feature of the WATCHDOG is enabled in the Sin-
gle-Chip Normal mode and a WATCHDOG Output (WO) will
occur if an attempt is made to access addresses that are
outside of the on-chip ROM and RAM range of the device
Ports A and B are used for I O functions and not for ad-
dressing external memory The EXM pin and the EA bit of
the PSW register must both be logic ‘‘0’’ to enter the Single-
Chip Normal mode
EXPANDED NORMAL MODE
The Expanded Normal mode of operation enables the
HPC16083 to address external memory in addition to the
on-chip ROM and RAM (see Table I) WATCHDOG illegal
address detection is disabled and memory accesses may
be made anywhere in the 64k byte address range without
triggering an illegal address condition The Expanded Nor-
mal mode is entered with the EXM pin pulled low (logic ‘‘0’’)
and setting the EA bit in the PSW register to ‘‘1’’
SINGLE-CHIP ROMLESS MODE
In this mode the on-chip mask programmed ROM of the
HPC16083 is not used The address space corresponding
to the on-chip ROM is mapped into external memory so 8k
bytes of external memory may be used with the HPC16083
(see Table I) The WATCHDOG circuitry detects illegal ad-
dresses (addresses not within the on-chip ROM and RAM
range) The Single-Chip ROMless mode is entered when the
EXM pin is pulled high (logic ‘‘1’’) and the EA bit is logic ‘‘0’’
EXPANDED ROMLESS MODE
This mode of operation is similar to Single-Chip ROMless
mode in that no on-chip ROM is used however a full 64k
bytes of external memory may be used The ‘‘illegal address
detection’’ feature of WATCHDOG is disabled The EXM pin
must be pulled high (logic ‘‘1’’) and the EA bit in the PSW
register set to ‘‘1’’ to enter this mode
TABLE I HPC16083 Operating Modes
Operating
Mode
EXM EA
Pin Bit
Memory
Configuration
Single-Chip Normal
0 0 E000 FFFF on-chip
Expanded Normal
0 1 E000 FFFF on-chip
0200 DFFF off-chip
Single-Chip ROMless 1 0 E000 FFFF off-chip
Expanded ROMless
1 1 0200 FFFF off-chip
Note In all operating modes the on-chip RAM and Registers (0000 01FF)
may be accessed
16










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