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PDF ( 数据手册 , 数据表 ) HUF75329D3S

零件编号 HUF75329D3S
描述 N-Channel UltraFET Power MOSFET
制造商 Fairchild Semiconductor
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HUF75329D3S 数据手册, 描述, 功能
Data Sheet
HUF75329D3S
October 2013
N-Channel UltraFET Power MOSFET
55 V, 20 A, 26 mΩ
These N-Channel power MOSFETs are manufactured
using the innovative UltraFET process. This advanced
process technology achieves the lowest possible on-
resistance per silicon area, resulting in outstanding
performance. This device is capable of withstanding high
energy in the avalanche mode and the diode exhibits very
low reverse recovery time and stored charge. It was
designed for use in applications where power efficiency is
important, such as switching regulators, switching
converters, motor drivers, relay drivers, low-voltage bus
switches, and power management in portable and battery-
operated products.
Formerly developmental type TA75329.
Ordering Information
PART NUMBER
HUF75329D3ST
PACKAGE
TO-252AA
BRAND
75329D
Features
• 20A, 55V
• Simulation Models
- Temperature Compensated PSPICE® and SABER™
Models
- SPICE and SABER Thermal Impedance Models
Available on the WEB at: www.fairchildsemi.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
JEDEC TO-252AA
GATE
SOURCE
DRAIN
(FLANGE)
Product reliability information can be found at http://www.fairchildsemi.com/products/discrete/reliability/index.html
For severe environments, see our Automotive HUFA series.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2001 Fairchild Semiconductor Corporation
HUF75329D3S Rev. C0







HUF75329D3S pdf, 数据表
HUF75329D3S
SABER Electrical Model
REV June 1997
template huf75329d n2, n1, n3
electrical n2, n1, n3
{
var i iscl
d..model dbodymod = (is = 7.50e-13, cjo = 1.51e-9, tt = 4.05e-8, m = 0.5)
d..model dbreakmod = ()
LDRAIN
d..model dplcapmod = (cjo = 13.5e-10, is = 1e-30, n = 10, m = 0.85)
m..model mmedmod = (type=_n, vto = 3.25, kp = 2.50, is = 1e-30, tox = 1)
m..model mstrongmod = (type=_n, vto = 3.80, kp = 70, is = 1e-30, tox = 1)
m..model mweakmod = (type=_n, vto = 2.91, kp = 0.06, is = 1e-30, tox = 1)
sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -7.90, voff = -4.90)
DPLCAP
10
5
RSLC1
51
RDBREAK
DRAIN
2
RLDRAIN
sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -4.90, voff = -7.90)
sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -0.50, voff = 2.50)
RSLC2
ISCL
72 RDBODY
sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 2.50, voff = -0.50)
c.ca n12 n8 = 1.72e-9
c.cb n15 n14 = 1.52e-9
c.cin n6 n8 = 9.61e-10
-
ESG
6
8
+
d.dbody n7 n71 = model=dbodymod
d.dbreak n72 n11 = model=dbreakmod
d.dplcap n10 n5 = model=dplcapmod
i.it n8 n17 = 1
GATE
1
LGATE
EVTEMP
RGATE + 18 -
9 20 22
RLGATE
6
l.ldrain n2 n5 = 1e-9
EVTHRES
+ 19 -
8
CIN
50
RDRAIN
16
21
DBREAK
11
MWEAK
MMED
MSTRO
8
EBREAK
+
17
18
-
7
71
DBODY
LSOURCE
SOURCE
3
l.lgate n1 n9 = 2.86e-9
l.lsource n3 n7 = 2.69e-9
RSOURCE
RLSOURCE
k.k1 i(l.lgate) i(l.lsource) = l(l.lgate), l(l.lsource), 0.0085
m.mmed n16 n6 n8 n8 = model=mmedmod, l = 1u, w = 1u
S1A
12 13
8
S2A
14 15
13
RBREAK
17 18
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l = 1u, w = 1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l = 1u, w = 1u
S1B
S2B
res.rbreak n17 n18 = 1, tc1 = 1.05e-3, tc2 = 1.94e-7
CA
13 CB
+ + 14
IT
RVTEMP
19
-
res.rdbody n71 n5 = 5.05e-3, tc1 = 2.21e-3, tc2 = 1.02e-6
res.rdbreak n72 n5 = 2.14e-1, tc1 = 9.62e-4, tc2 = 1.23e-6
res.rdrain n50 n16 = 1e-3, tc1 = 8.04e-2, tc2 = 1.37e-4
res.rgate n9 n20 = 1.52
EGS
6
8
-
EDS
5
8
-
8
VBAT
+
22
res.rldrain n2 n5 = 10
RVTHRES
res.rlgate n1 n9 = 26.9
res.rlsource n3 n7 = 28.6
res.rslc1 n5 n51 = 1e-6, tc1 = 4.83e-3, tc2 = 1.16e-6
res.rslc2 n5 n50 = 1e3
res.rsource n8 n7 = 13.85e-3, tc1 = 0, tc2 = 0
res.rvtemp n18 n19 = 1, tc1 = -1.35e-3, tc2 = 1.16e-6
res.rvthres n22 n8 = 1, tc1 = -3.43e-3, tc2 = -1.63e-5
spe.ebreak n11 n7 n17 n18 = 58.13
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
spe.esg n6 n10 n6 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
spe.evthres n6 n21 n19 n8 = 1
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc = 1
equations {
i (n51->n50) + = iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/135))** 3.5))
}
}
©2001 Fairchild Semiconductor Corporation
HUF75329D3S Rev. C0














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