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PDF ( 数据手册 , 数据表 ) ADC0806

零件编号 ADC0806
描述 500 ns A/D Converter with S/H Function and Input Multiplexer
制造商 National Semiconductor
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ADC0806 数据手册, 描述, 功能
January 2003
ADC08060
8-Bit, 20 MSPS to 60 MSPS, 1.3 mW/MSPS A/D Converter
General Description
The ADC08060 is a low-power, 8-bit, monolithic analog-to-
digital converter with an on-chip track-and-hold circuit. Opti-
mized for low cost, low power, small size and ease of use,
this product operates at conversion rates of 20 MSPS to 70
MSPS with outstanding dynamic performance over its full
operating range while consuming just 1.3 mW per MHz of
clock frequency. That’s just 78 mW of power at 60 MSPS.
Raising the PD pin puts the ADC08060 into a Power Down
mode where it consumes just 1 mW.
The unique architecture achieves 7.5 Effective Bits with
25 MHz input frequency. The excellent DC and AC charac-
teristics of this device, together with its low power consump-
tion and single +3V supply operation, make it ideally suited
for many imaging and communications applications, includ-
ing use in portable equipment. Furthermore, the ADC08060
is resistant to latch-up and the outputs are short-circuit proof.
The top and bottom of the ADC08060’s reference ladder are
available for connections, enabling a wide range of input
possibilities. The digital outputs are TTL/CMOS compatible
with a separate output power supply pin to support interfac-
ing with 3V or 2.5V logic. The digital inputs (CLK and PD) are
TTL/CMOS compatible.
The ADC08060 is offered in a 24-lead plastic package
(TSSOP) and is specified over the industrial temperature
range of −40˚C to +85˚C.
Features
n Single-ended input
n Internal sample-and-hold function
n Low voltage (single +3V) operation
n Small package
n Power-down feature
Key Specifications
n Resolution
8 bits
n Maximum sampling frequency
60 MSPS (min)
n DNL
0.4 LSB (typ)
n ENOB
7.5 bits (typ) at fIN = 25 MHz
n THD
−60 dB (typ)
n No missing codes
Guaranteed
n Power Consumption
n Operating
1.3 mW/MSPS (typ)
n Power down
1 mW (typ)
Applications
n Digital imaging systems
n Communication systems
n Portable instrumentation
n Viterbi decoders
n Set-top boxes
Pin Configuration
© 2003 National Semiconductor Corporation DS200062
20006201
www.national.com







ADC0806 pdf, 数据表
Typical Performance Characteristics VA = DR VD = 3V, fCLK = 60 MHz, fIN = 10 MHz, unless
otherwise stated (Continued)
DNL vs Supply Voltage
DNL vs Sample Rate
SNR vs Temperature
20006218
20006211
SNR vs Supply Voltage
20006220
SNR vs Sample Rate
20006221
SNR vs Input Frequency
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20006212
8
20006223







ADC0806 equivalent, schematic
Applications Information (Continued)
20006234
FIGURE 4. The input amplifier should incorporate some gain for best performance (see text).
The RC at the amplifier output filters the clock rate energy
that comes out of the analog input due to the input sampling
circuit. The optimum time constant for this circuit depends
not only upon the amplifier and ADC, but also on the circuit
layout and board material. A resistor value should be chosen
between 18and 47and the capacitor value chose ac-
cording to the formula
This will provide optimum SNR performance. Best THD per-
formance is realized when the capacitor and resistor values
are both zero. To optimize SINAD, reduce the capacitor
value until SINAD performance is optimized. That is, until
SNR = −THD. This value will usually be in the range of 40%
to 65% of the value calculated with the above formula. An
accurate calculation is not possible because of the board
material and layout dependance.
The above is indended for oversampling or Nyquist applica-
tions. There should be no resistor or capacitor between the
ADC input and any amplifier for undersampling applications.
The circuit of Figure 4 has both gain and offset adjustments.
If you eliminate these adjustments normal circuit tolerances
may cause signal clipping unless care is exercised in the
worst case analysis of component tolerances and the input
signal excursion is appropriately limited to account for the
worst case conditions. Of course, this means that the de-
signer will not be able to count on getting a full scale output
with maximum signal input.
3.0 POWER SUPPLY CONSIDERATIONS
A/D converters draw sufficient transient current to corrupt
their own power supplies if not adequately bypassed. A
10 µF tantalum or aluminum electrolytic capacitor should be
placed within an inch (2.5 cm) of the A/D power pins, with a
0.1 µF ceramic chip capacitor placed within one centimeter
of the converter’s power supply pins. Leadless chip capaci-
tors are preferred because they have low lead inductance.
While a single voltage source is recommended for the VA
and DR VD supplies of the ADC08060, these supply pins
should be well isolated from each other to prevent any digital
noise from being coupled into the analog portions of the
ADC. A choke or 27resistor is recommended between
these supply lines with adequate bypass capacitors close to
the supply pins.
As is the case with all high speed converters, the ADC08060
should be assumed to have little power supply rejection.
None of the supplies for the converter should be the supply
that is used for other digital circuitry in any system with a lot
of digital power being consumed. The ADC supplies should
be the same supply used for other analog circuitry.
No pin should ever have a voltage on it that is in excess of
the supply voltage or below ground by more than 300 mV,
not even on a transient basis. This can be a problem upon
application of power and power shut-down. Be sure that the
supplies to circuits driving any of the input pins, analog or
digital, do not come up any faster than does the voltage at
the ADC08060 power pins.
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