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PDF ( 数据手册 , 数据表 ) ADC0800

零件编号 ADC0800
描述 ADC0800 8-Bit A/D Converter
制造商 National Semiconductor
LOGO National Semiconductor LOGO 


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ADC0800 数据手册, 描述, 功能
ADC0800 8-Bit A D Converter
General Description
The ADC0800 is an 8-bit monolithic A D converter using P-
channel ion-implanted MOS technology It contains a high
input impedance comparator 256 series resistors and ana-
log switches control logic and output latches Conversion is
performed using a successive approximation technique
where the unknown analog voltage is compared to the re-
sistor tie points using analog switches When the appropri-
ate tie point voltage matches the unknown voltage conver-
sion is complete and the digital outputs contain an 8-bit
complementary binary word corresponding to the unknown
The binary output is TRI-STATE to permit bussing on com-
mon data lines
The ADC0800PD is specified over b55 C to a125 C and
the ADC0800PCD is specified over 0 C to 70 C
Block Diagram
Features
Y Low cost
Y g5V 10V input ranges
Y No missing codes
Y Ratiometric conversion
Y TRI-STATE outputs
Y Fast
Y Contains output latches
Y TTL compatible
Y Supply voltages
Y Resolution
Y Linearity
Y Conversion speed
Y Clock range
February 1995
TCe50 ms
5 VDC and b12 VDC
8 bits
g1 LSB
40 clock periods
50 to 800 kHz
(00000000e afull-scale)
TRI-STATE is a registered trademark of National Semiconductor Corp
C1995 National Semiconductor Corporation TL H 5670
TL H 5670 – 1
RRD-B30M115 Printed in U S A







ADC0800 pdf, 数据表
Typical Applications (Continued)
The digital output LED display can be decoded by dividing
the 8 bits into the 4 most significant bits and 4 least signifi-
cant bits Table I shows the fractional binary equivalent of
these two 8-bit groups By adding the decoded voltages
which are obtained from the column ‘‘Input Voltage Value
with a 10 240 VREF’’ of both the MS and LS groups the
value of the digital display can be determined For example
for an output LED display of ‘‘1011 0110’’ or ‘‘B6’’ (in hex)
the voltage values from the table are 7 04 a 0 24 or
7 280 VDC These voltage values represent the center val-
ues of a perfect A D converter The input voltage has to
change by g LSB (g20 mV) the ‘‘quantization uncertain-
ty’’ of an A D to obtain an output digital code change The
effects of this quantization error have to be accounted for in
the interpretation of the test results A plot of this natural
error source is shown in Figure 5 where for clarity both the
analog input voltage and the error voltage are normalized to
LSBs
TABLE I DECODING THE DIGITAL OUTPUT LEDs
HEX
BINARY
FRACTIONAL BINARY VALUE FOR
MS GROUP
LS GROUP
INPUT VOLTAGE
VALUE WITH
10 24 VREF
MS GROUP LS GROUP
F 1111
15 16
15 256
E 1110
78
7 128
D 1101
13 16
13 256
C 1100
34
3 64
B 1011
11 16
11 256
A 1010
58
5 128
9 1001
9 16
9 256
8 1 0 0 0 12
1 32
7 0111
7 16
7 256
6 0110
38
3 128
5 0101
5 16
5 256
4 0100
14
1 64
3 0011
3 16
3 256
2 0010
18
1 128
1 0001
1 16
1 256
0 0000
9 600
8 960
8 320
7 680
7 040
6 400
5 760
5 120
4 480
3 840
3 200
2 560
1 920
1 280
0 640
0
0 600
0 560
0 520
0 480
0 440
0 400
0 360
0 320
0 280
0 240
0 200
0 160
0 120
0 080
0 040
0
TL H 5670 – 8
FIGURE 5 Error Plot of a Perfect A D Showing Effects of Quantization Error
8














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