DataSheet8.cn


PDF ( 数据手册 , 数据表 ) 9639

零件编号 9639
描述 N-CHANNEL 150V - 0.045 OHM - 5A SO-8 LOW GATE CHARGE STripFET POWER MOSFET
制造商 STMicroelectronics
LOGO STMicroelectronics LOGO 


1 Page

No Preview Available !

9639 数据手册, 描述, 功能
ST95P04
SERIAL ACCESS SPI BUS 4K (512 x 8) EEPROM
1 MILLION ERASE/WRITE CYCLES
40 YEARS DATA RETENTION
SINGLE 3V to 5.5V SUPPLY VOLTAGE
SPI BUS COMPATIBLE SERIAL INTERFACE
1 MHz CLOCK RATE MAX
BLOCK WRITE PROTECTION
STATUS REGISTER
16 BYTE PAGE MODE
WRITE PROTECT
SELF-TIMED PROGRAMMING CYCLE
E.S.D.PROTECTION GREATER than 4000V
The ST95P04 will be replaced shortly by the
updated version ST95040
NOT FOR NEW DESIGN
8
1
PSDIP8 (B)
0.25mm Frame
8
1
SO8 (M)
DESCRIPTION
The ST95P04 is a 4K bit Electrically Erasable
Programmable Memory (EEPROM) fabricated with
SGS-THOMSON’s High Endurance Single Polysili-
con CMOS technology. The 4K bit memory is or-
ganised as 32 pages of 16 bytes. The memory is
accessed by a simple SPI bus compatible serial
interface. The bus signals are a serial clock input
(C), a serial data input (D) and a serial data output
(Q). The device connected to the bus is selected
when the chip select input (S) goes low. Commu-
nications with the chip can be interrupted with a
hold input (HOLD). The write operation is disabled
by a write protect input (W).
Table 1. Signal Names
C
D
Q
S
W
HOLD
VCC
VSS
Serial Clock
Serial Data Input
Serial Data Output
Chip Select
Write Protect
Hold
Supply Voltage
Ground
Figure 1. Logic Diagram
VCC
D
C
S
W
HOLD
ST95P04
VSS
Q
AI01063B
June 1996
1/16







9639 pdf, 数据表
ST95P04
Read Status Register (RDSR)
The RDSR instruction provides access to the status
register. The status register may be read at any
time, even during a non-volatile write. As soon as
the 8th bit of the status register is read out, the
ST95P04 enters a wait mode (data on D are not
decoded, Q is in Hi-Z) until it is deselected.
The status register format is as follows:
b7 b0
1 1 1 1 BP1 BP0 WEL WIP
BP1, BP0: Read and Write bits
WEL, WIP: Read only bits.
During a non-volatile write to the memory array, all
bits BP1, BP0, WEL, WIP are valid and can be read.
During a non volatile write to the status register, the
only bits WEL and WIP are valid and can be read.
The values of BP1 and BP0 read at that time
correspond to the previous contents of the status
register.
The Write-In-Process (WIP) read only bit indicates
whether the ST95P04 is busy with a write opera-
tion. When set to a ’1’ a write is in progress, when
set to a ’0’ no write is in progress.
The Write Enable Latch (WEL) read only bit indi-
cates the status of the write enable latch. When set
to a ’1’ the latch is set, when set to a ’0’ the latch is
reset.
The Block Protect (BP0 and BP1) bits indicate the
extent of the protection employed. These bits are
set by the user issuing the WRSR instruction.
These bits are non-volatile.
Write Status Register (WRSR)
The WRSR instruction allows the user to select the
size of protected memory. The ST95P04 is divided
into four 1024 bit blocks. The user may read the
blocks but will be unable to write within the selected
blocks.
The blocks and respective WRSR control bits are
shown in Table 6.
When the WRSR instruction and the 8 bits of the
Status Register are latched-in, the internal write
cycle is then triggered by the rising edge of S. This
rising edge of S must appear after the 8th bit of the
Status Register content (it must not appear a 17th
clock pulse before the rising edge of S), otherwise
the internal write sequence is not performed.
Read Operation
The chip is first selected by putting S low. The serial
one byte read instruction is followed by a one byte
address (A7-A0), each bit being latched-in during
the rising edge of the clock (C). Bit 3 of the read
instruction contains address A8 (most significant
address bit). This bit is used to select the first or
second page of the device. Then, the data stored
in the memory at the selected address is shifted out
on the Q output pin; each bit being shifted out
during the falling edge of the clock (C). The data
stored in the memory at the next address can be
read in sequence by continuing to provide clock
Table 6. Array Addresses Protect
Status Register Bits
BP1 BP0
Array Addresses
Protected
00
01
10
none
180h - 1FFh
100h - 1FFh
11
000h - 1FFh
Table 7. Instruction Set
Instruction
WREN
WRDI
RDSR
WRSR
READ
WRITE
Notes: A = 1, Upper page selected
A = 0, Lower page selected
X = Don’t care
8/16
Description
Set Write Enable Latch
Reset Write Enable Latch
Read Status Register
Write Status Register
Read Data from Memory Array
Write Data to Memory Array
Instruction Format
0000 X110
0000 X100
0000 X101
0000 X001
0000 A011
0000 A010







9639 equivalent, schematic
ST95P04
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectronics.
© 1996 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
16/16










页数 16 页
下载[ 9639.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
9639N-CHANNEL 150V - 0.045 OHM - 5A SO-8 LOW GATE CHARGE STripFET POWER MOSFETSTMicroelectronics
STMicroelectronics

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap