DataSheet8.cn


PDF ( 数据手册 , 数据表 ) AD2S81A

零件编号 AD2S81A
描述 Variable Resolution/ Monolithic Resolver-to-Digital Converters
制造商 Analog Devices
LOGO Analog Devices LOGO 


1 Page

No Preview Available !

AD2S81A 数据手册, 描述, 功能
a
Variable Resolution, Monolithic
Resolver-to-Digital Converters
AD2S81A/AD2S82A
FEATURES
Monolithic (BiMOS ll) Tracking R/D Converter
Ratiometric Conversion
Low Power Consumption: 300 mW Typ
Dynamic Performance Set by User
Velocity Output
ESD Class 2 Protection (2,000 V Min)
AD2S81A
28-Lead DIP Package
Low Cost
AD2S82A
44-Lead PLCC Package
10-, 12-, 14- and 16-Bit Resolution Set by User
High Max Tracking Rate 1040 RPS (10 Bits)
VCO Output (Inter LSB Output)
Data Complement Facility
Industrial Temperature Range
APPLICATIONS
DC Brushless and AC Motor Control
Process Control
Numerical Control of Machine Tools
Robotics
Axis Control
GENERAL DESCRIPTION
The AD2S82A is a monolithic 10-, 12-, 14- or 16-bit tracking
resolver-to-digital converter contained in a 44-lead J leaded
PLCC package. Two extra functions are provided in the new
surface mount package–COMPLEMENT and VCO output.
The AD2S81A is a monolithic 12-bit fixed resolution tracking
resolver-to-digital converter packaged in a 28-lead DIP.
The converters allow users to select their own dynamic performance
with external components. This allows the users great flexibility in
defining the converter that best suits their system requirements.
The AD2S82A allows users to select the resolution to be 10, 12,
14 or 16 bits and to track resolver signals rotating at up to 1040
revs per second (62,400 rpm) when set to 10-bit resolution.
The AD2S81A and AD2S82A convert resolver format input
signals into a parallel natural binary digital word using a ratio-
metric tracking conversion method. This ensures high-noise
immunity and tolerance of lead length when the converter is
remote from the resolver.
The output word is in a three-state digital logic form available in
two bytes on the 16 output data lines for the AD2S82A and on
eight output data lines for the AD2S81A. BYTE SELECT,
ENABLE and INHIBIT pins ensure easy data transfer to 8- and
16-bit data buses, and outputs are provided to allow for cycle or
pitch counting in external counters.
AD2S82A FUNCTIONAL BLOCK DIAGRAM
SIN I/P
SIGNAL
GND
COS I/P
ANALOG
GND
RIPPLE
CLK
+12V
–12V
COMP
DATA
LOAD
DEMOD DEMOD INTEGRATOR
I/P O/P
I/P
AD2S82A
A1
SEGMENT
SWITCHING
A2
PHASE
SENSITIVE
DETECTOR
R-2R
DAC
A3
INTEGRATOR
O/P
AC ERROR
O/P
16-BIT
UP/DOWN COUNTER
VCO DATA
TRANSFER
LOGIC
OUTPUT DATA LATCH
SC2
SC1 ENABLE
16 DATA BITS
BUSY DIR
BYTE
SELECT
VCO I/P
INHIBIT
VCO O/P
+5V
DIGITAL
GND
An analog signal proportional to velocity is also available and
can be used to replace a tachogenerator.
PRODUCT HIGHLIGHTS
Monolithic. A one-chip solution reduces the package size re-
quired and increases the reliability.
Resolution Set by User. Two control pins are used to select
the resolution of the AD2S82A to be 10, 12, 14 or 16 bits al-
lowing the user to use the AD2S82A with the optimum resolu-
tion for each application.
Ratiometric Tracking Conversion. Conversion technique
provides continuous output position data without conversion
delay and is insensitive to absolute signal levels. It also provides
good noise immunity and tolerance to harmonic distortion on
the reference and input signals.
Dynamic Performance Set by the User. By selecting exter-
nal resistor and capacitor values the user can determine band-
width, maximum tracking rate and velocity scaling of the
converter to match the system requirements. The external com-
ponents required are all low cost, preferred value resistors and
capacitors, and the component values are easy to select using
the simple instructions given.
Velocity Output. An analog signal proportional to velocity is
available and is linear to typically one percent. This can be used
in place of a velocity transducer in many applications to provide
loop stabilization in servo controls and velocity feedback data.
Low Power Consumption. Typically only 300 mW.
MODELS AVAILABLE
Information on the models available is given in the Ordering
Guide.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998







AD2S81A pdf, 数据表
AD2S81A/AD2S82A
COMPONENT SELECTION
The following instructions describe how to select the external
components for the converter in order to achieve the required
bandwidth and tracking rate. In all cases the nearest “preferred
value’’ component should be used and a 5% tolerance will not
degrade the overall performance of the converter. Care should
be taken that the resistors and capacitors will function over the
required operating temperature range. The components should
be connected as shown in Figure 1.
PC compatible software is available to help users select the optimum
component values for the AD2S81A and AD2S82A, and display the
transfer gain, phase and small step response.
For more detailed information and explanation, see the Circuit
Functions and Dynamic Performance section.
1. HF Filter (R1, R2, C1, C2)
The function of the HF filter is to remove any dc offset and
to reduce the amount of noise present on the signal inputs
to the AD2S81A/AD2S82A, reaching the Phase Sensitive
Detector and affecting the outputs. R1 and C2 may be omit-
ted—in which case R2 = R3 and C1 = C3, calculated below—
but their use is particularly recommended if noise from
switch mode power supplies and brushless motor drive is
present.
Values should be chosen so that
15 kΩ ≤ R1 = R2 56 k
C1 = C2
1
2 π R1 fREF
and fREF = Reference Frequency
(Hz)
This filter gives an attenuation of three times at the input to
the phase sensitive detector.
2. Gain Scaling Resistor (R4)
If R1, C2 are fitted, then:
R4 =
EDC
100 × 109
×
1
3
where 100 × 10–9 = current/LSB
If R1, C2 are not fitted, then:
R4
=
EDC
100 × 10–9
where EDC = 160 × 10–3 for 10 bits resolution
= 40 × 10–3 for 12 bits
= 10 × 10–3 for 14 bits
= 2.5 × 10–3 for 16 bits
= Scaling of the DC ERROR in volts
3. AC Coupling of Reference Input (R3, C3)
Select R3 and C3 so that there is no significant phase shift at
the reference frequency. That is,
with R3 in .
R3 = 100 k
1
C3 >
F
R 3 × fREF
4. Maximum Tracking Rate (R6)
The VCO input resistor R6 sets the maximum tracking rate
of the converter, and hence the velocity scaling as at the max
tracking rate, the velocity output will be 8 V.
Decide on your maximum tracking rate, “T,” in revolutions
per second. Note that “T” must not exceed the maximum
tracking rate or 1/16 of the reference frequency.
R6 = 6. 32 × 1010
T ×n
where n = bits per revolution
= 1,024 for 10 bits resolution
= 4,096 for 12 bits
= 16,384 for 14 bits
= 65,536 for 16 bits
5. Closed-Loop Bandwidth Selection (C4, C5, R5)
a. Choose the closed-loop bandwidth (fBW) required
ensuring that the ratio of reference frequency to band-
width does exceed the following guidelines:
Resolution
10
12
14
16
Ratio of Reference Frequency/Bandwidth
2.5 : 1
4 :1
6 :1
7.5 : 1
Typical values may be 100 Hz for a 400 Hz reference fre-
quency and 500 Hz to 1000 Hz for a 5 kHz reference
frequency.
b. Select C4 so that
C4 = 21 F
R6 ×
f
BW
2
with R6 in and fBW, in Hz selected above.
c. C5 is given by
C5 = 5 × C4 F
d. R5 is given by
R5 = 4
2 × π × f BW × C5
6. VCO Phase Compensation
The following values of C6 and R7 should be fitted.
C6 = 470 pF, R7 = 68
7. Offset Adjust
Offsets and bias currents at the integrator input can cause an
additional positional offset at the output of the converter of
1 arc minute typical, 5.3 arc minutes maximum. If this can be
tolerated, then R8 and R9 can be omitted from the circuit.
If fitted, the following values of R8 and R9 should be used:
R8 = 4.7 M, R9 = 1 Mpotentiometer
To adjust the zero offset, ensure the resolver is disconnected
and all the external components are fitted. Connect the COS
pin to the REFERENCE I/P and the SIN pin to the SIGNAL
GND and with the power and reference applied, adjust the
potentiometer to give all “0s” on the digital output bits.
The potentiometer may be replaced with select on test resistors
if preferred.
–8– REV. B







AD2S81A equivalent, schematic
AD2S81A/AD2S82A
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Ceramic DIP (D) Package
(D-28)
0.005 (0.13) MIN
0.100 (2.54) MAX
28 15
0.610 (15.49)
0.500 (12.70)
1 14
PIN 1
0.225
(5.72)
MAX
1.490 (37.85) MAX
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
0.200 (5.08) 0.026 (0.66) 0.110 (2.79) 0.070 (1.78) SEATING
0.125 (3.18) 0.014 (0.36) 0.090 (2.29) 0.030 (0.76) PLANE
0.620 (15.75)
0.590 (14.99)
0.018 (0.46)
0.008 (0.20)
Plastic Leaded Chip Carrier (P) Package
(P-44A)
0.048 (1.21)
0.042 (1.07)
0.048 (1.21)
0.042 (1.07)
0.056 (1.42)
0.042 (1.07)
6
7 PIN 1
IDENTIFIER
40
39
TOP VIEW
(PINS DOWN)
0.180 (4.57)
0.165 (4.19)
0.025 (0.63)
0.015 (0.38)
0.050
(1.27) 0.63 (16.00)
BSC 0.59 (14.99)
0.021 (0.53)
0.013 (0.33)
0.020
(0.50)
R
17
18
29
28
0.656 (16.66)
0.650 (16.51) SQ
0.695 (17.65)
0.685 (17.40) SQ
0.032 (0.81)
0.026 (0.66)
0.040 (1.01)
0.025 (0.64)
0.110 (2.79)
0.085 (2.16)
–16–
REV. B










页数 16 页
下载[ AD2S81A.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
AD2S81AVariable Resolution/ Monolithic Resolver-to-Digital ConvertersAnalog Devices
Analog Devices

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap