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PDF ( 数据手册 , 数据表 ) AD2S1200

零件编号 AD2S1200
描述 12-Bit R/D Converter with Reference Oscillator
制造商 Analog Devices
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AD2S1200 数据手册, 描述, 功能
12-Bit R/D Converter
with Reference Oscillator
AD2S1200
FEATURES
Complete monolithic R/D converter
Parallel and serial 12-bit data ports
System fault detection
Absolute position and velocity outputs
Differential inputs
±11 arc minutes of accuracy
1,000 rps maximum tracking rate, 12-bit resolution
Incremental encoder emulation (1,024 pulses/rev)
Programmable sinusoidal oscillator on-board
Compatible with DSP and SPI® interface standards
204.8 kHz square wave output
Single-supply operation (5.00 V ± 5%)
40°C to +125°C temperature rating
44-lead LQFP package
4 kV ESD protection
GENERAL DESCRIPTION
The AD2S1200 is a complete 12-bit resolution tracking resolver-
to-digital converter, integrating an on-board programmable
sinusoidal oscillator that provides sine wave excitation for
resolvers. An external 8.192 MHz crystal is required to provide
a precision time reference. This clock is internally divided to
generate a 4.096 MHz clock to drive all the peripherals.
The converter accepts 3.6 V p-p ± 10% input signals, in the
range of 10 kHz to 20 kHz on the Sin and Cos inputs. A Type II
servo loop is employed to track the inputs and convert the input
Sin and Cos information into a digital representation of the
input angle and velocity. The bandwidth of the converter is set
internally to 1.7 kHz with an external 8.192 MHz crystal. The
maximum tracking rate is 1,000 rps.
FUNCTIONAL BLOCK DIAGRAM
REFBYP REFOUT
FS1 FS2
CLKIN
XTALOUT (8.192MHz)
EXC
EXC
SinLO
Sin
CosLO
Cos
A
B
NM
SAMPLE
AD2S1200
VOLTAGE
REFERENCE
(4.096MHz)
INTERNAL
CLOCK
GENERATOR
REFERENCE
OSCILLATOR
(DAC)
(204.8kHz)
CLOCK
DIVIDER
SYNTHETIC
REFERENCE
FAULT
INDICATORS
ADC
ANGLE θ
ADC
ERROR
MONITOR
MONITOR
CALCULATION/
SIGNAL
ERROR
DEMODULATOR ERROR
MONITOR
ANGLE φ
DIGITAL
FILTER
ENCODER
EMULATION
POSITION
INTEGRATOR
VELOCITY
INTEGRATOR
CPO
DOS
LOT
DIR
POSITION REGISTER
VELOCITY REGISTER
MULTIPLEXER
DATA BUS OUTPUT
CS
RD
RESET RDVEL SOE
DB11
SO
DB10
SCLK
Figure 1.
DB9–DB0
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2003 Analog Devices, Inc. All rights reserved.







AD2S1200 pdf, 数据表
AD2S1200
RESOLVER FORMAT SIGNALS
Vr = Vp × Sin(ϖt)
R1
θ
R2
S2
Va = Vs × Sin(ϖt) × Cos(θ)
S4
S1 S3
Vb = Vs × Sin(ϖt) × Sin(θ)
R1
R2
Vr = Vp × Sin(ϖt)
θ
S2
Va = Vs × Sin(ϖt) × Cos(θ)
S4
S1 S3
Vb = Vs × Sin(ϖt) × Sin(θ)
(A) CLASSICAL RESOLVER
(B) VARIABLE RELUCTANCE RESOLVER
Figure 3. Classical Resolver vs. Variable Reluctance Resolver
A resolver is a rotating transformer typically with a primary
winding on the rotor and two secondary windings on the stator.
In the case of a variable reluctance resolver, there are no wind-
ings on the rotor as shown in Figure 3. The primary winding is
on the stator as well as the secondary windings, but the saliency
in the rotor design provides the sinusoidal variation in the
secondary coupling with the angular position. Either way, the
resolver output voltages (S3–S1, S2–S4) will have the same
equations as shown in Equation 1.
S3 S1 = E0 Sinωt × Sinθ
S2 S4 = E0 Sinωt ×Cosθ
θ = Shaft Angle
Sinωt = Rotor Excitation Frequency
E0 = Rotor Excitation Amplitude
Equation 1.
The stator windings are displaced mechanically by 90° (see
Figure 3). The primary winding is excited with an ac reference.
The amplitude of subsequent coupling onto the stator secon-
dary windings is a function of the position of the rotor (shaft)
relative to the stator. The resolver, therefore, produces two
output voltages (S3–S1, S2–S4) modulated by the SinE and
CoSinE of shaft angle. Resolver format signals refer to the
signals derived from the output of a resolver as shown in
Equation 1. Figure 4 illustrates the output format.
S2 TO S4
(Cos)
S3 TO S1
(Sin)
R2 TO R4
(REF)
90°
180°
270°
θ
Figure 4. Electrical Resolver Representation
360°
Rev. 0 | Page 8 of 24







AD2S1200 equivalent, schematic
AD2S1200
INCREMENTAL ENCODER OUTPUTS
The incremental encoder emulation outputs A, B, and NM are
free running and are always valid, providing that valid resolver
format input signals are applied to the converter.
The AD2S1200 emulates a 1024-line encoder. Relating this to
converter resolution means one revolution produces 1,024 A, B
pulses. A leads B for increasing angular rotation (i.e., clockwise
direction). The addition of the DIR output negates the need for
external A and B direction decode logic. The DIR output
indicates the direction of the input rotation and it is high for
increasing angular rotation. DIR can be considered as an
asynchronous output and can make multiple changes in state
between two consecutive LSB update cycles. This occurs when
the direction of rotation of the input changes but the magnitude
of the rotation is less than 1 LSB.
The north marker pulse is generated as the absolute angular
position passes through zero. The north marker pulse width is
set internally for 90° and is defined relative to the A cycle.
Figure 9 details the relationship between A, B, and NM.
A
B
NM
Figure 9. A, B, and NM Timing for Clockwise Rotation
Unlike incremental encoders, the AD2S1200 encoder output is
not subject to error specifications such as cycle error, eccentric-
ity, pulse and state width errors, count density, and phase ϕ. The
maximum speed rating, n, of an encoder is calculated from its
maximum switching frequency, fMAX, and its pulses per revo-
lution (PPR).
n = 60 × f MAX
PPR
The AD2S1200 A, B pulses are initiated from XTALOUT, which
has a frequency of 4.096 MHz. The equivalent encoder
switching frequency is
1/ 4 × 4.096 MHz = 1.024 MHz (4Updates = 1Pulse)
At 12 bits, the PPR = 1,024. Therefore, the maximum speed, n,
of the AD2S1200 is
n
=
60 ×1,024,000
1,024
=
60000
rpm
To get a maximum speed of 60,000 rpm, an external crystal of
8.192 MHz has to be chosen in order to produce an internal
CLOCKOUT equal to 4.096 MHz.
This compares favorably with encoder specifications where fMAX
is specified from 20 kHz (photo diodes) to 125 kHz (laser
based) depending on the light system used. A 1,024 line laser-
based encoder will have a maximum speed of 7,300 rpm.
The inclusion of A, B outputs allows the AD2S1200 plus
resolver solution to replace optical encoders directly without the
need to change or upgrade existing application software.
ON-BOARD PROGRAMMABLE SINUSOIDAL
OSCILLATOR
An on-board oscillator provides the sinusoidal excitation signal
(EXC) to the resolver as well as its complemented signal (EXC).
The frequency of this reference signal is programmable to four
standard frequencies (10 kHz, 12 kHz, 15 kHz, or 20 kHz) using
the FS1 and FS2 pins (see Table 7). FS1 and FS2 have internal pull-
ups, so the default frequency is 10 kHz. The amplitude of this
signal is centered on 2.5 V and has an amplitude of 3.6 V p-p.
Table 7. Excitation Frequency Selection
Frequency Selection (kHz)
FS1
10 1
12 1
15 0
20 0
FS2
1
0
1
0
The reference output of the AD2S1200 will need an external
buffer amplifier to provide gain and the additional current to
drive a resolver. Refer to Figure 6 for a suggested buffer circuit.
The AD2S1200 also provides an internal synchronous reference
signal that is phase locked to its Sin and Cos inputs. Phase
errors between the resolver primary and secondary windings
could degrade the accuracy of the RDC and are compensated by
this synchronous reference signal. This also compensates the
phase shifts due to temperature and cabling and eliminates the
need of an external preset phase compensation circuits.
Rev. 0 | Page 16 of 24










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