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PDF ( 数据手册 , 数据表 ) AD5253

零件编号 AD5253
描述 Quad 64-/256-Position I2C Nonvolatile Memory Digital Potentiometers
制造商 Analog Devices
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AD5253 数据手册, 描述, 功能
Data Sheet
Quad 64-/256-Position I2C Nonvolatile
Memory Digital Potentiometers
AD5253/AD5254
FEATURES
AD5253: quad 64-position resolution
AD5254: quad 256-position resolution
1 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Nonvolatile memory1 stores wiper settings w/write protection
Power-on refreshed to EEMEM settings in 300 µs typ
EEMEM rewrite time = 540 µs typ
Resistance tolerance stored in nonvolatile memory
12 extra bytes in EEMEM for user-defined information
I2C-compatible serial interface
Direct read/write access of RDAC2 and EEMEM registers
Predefined linear increment/decrement commands
Predefined ±6 dB step change commands
Synchronous or asynchronous quad-channel update
Wiper setting readback
4 MHz bandwidth—1 kΩ version
Single supply 2.7 V to 5.5 V
Dual supply ±2.25 V to ±2.75 V
2 slave address-decoding bits allow operation of 4 devices
100-year typical data retention, TA = 55°C
Operating temperature: –40°C to +105°C
APPLICATIONS
Mechanical potentiometer replacement
Low resolution DAC replacement
RGB LED backlight control
White LED brightness adjustment
RF base station power amp bias control
Programmable gain and offset control
Programmable attenuators
Programmable voltage-to-current conversion
Programmable power supply
Programmable filters
Sensor calibrations
GENERAL DESCRIPTION
The AD5253/AD5254 are quad-channel, I2C®, nonvolatile
mem-ory, digitally controlled potentiometers with 64/256
positions, respectively. These devices perform the same
electronic adjust-ment functions as mechanical potentiometers,
trimmers, and variable resistors.
The parts’ versatile programmability allows multiple modes of
operation, including read/write access in the RDAC and EEMEM
registers, increment/decrement of resistance, resistance changes
in ±6 dB scales, wiper setting readback, and extra EEMEM for
storing user-defined information, such as memory data for other
components, look-up table, or system identification information.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAM
VDD
VSS
DGND
WP
SCL
SDA
AD0
AD1
RDAC EEMEM
EEMEM
POWER-ON
REFRESH
RAB TOL
I2C
SERIAL
INTERFACE
DATA
CONTROL
COMMAND
DECODE LOGIC
ADDRESS
DECODE LOGIC
CONTROL LOGIC
AD5253/AD5254
RDAC0
REGIS-
TER
RDAC1
REGIS-
TER
RDAC2
REGIS-
TER
RDAC3
REGIS-
TER
RDAC0
A0
W0
B0
RDAC1
A1
W1
B1
RDAC2
A2
W2
B2
RDAC3
A3
W3
B3
Figure 1.
The AD5253/AD5254 allow the host I2C controllers to write
any of the 64-/256-step wiper settings in the RDAC registers
and store them in the EEMEM. Once the settings are stored,
they are restored automatically to the RDAC registers at system
power-on; the settings can also be restored dynamically.
The AD5253/AD5254 provide additional increment,
decrement, +6 dB step change, and –6 dB step change in
synchronous or asynchronous channel update mode. The
increment and decrement functions allow stepwise linear
adjustments, with a ± 6 dB step change equivalent to doubling
or halving the RDAC wiper setting. These functions are useful
for steep-slope, nonlinear adjustments, such as white LED
brightness and audio volume control.
The AD5253/AD5254 have a patented resistance-tolerance
storing function that allows the user to access the EEMEM and
obtain the absolute end-to-end resistance values of the RDACs
for precision applications.
The AD5253/AD5254 are available in TSSOP-20 packages in
1 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ options. All parts are
guaranteed to operate over the –40°C to +105°C extended
industrial temperature range.
1The terms nonvolatile memory and EEMEM are used interchangeably.
2The terms digital potentiometer and RDAC are used interchangeably.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2003–2012 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com







AD5253 pdf, 数据表
AD5253/AD5254
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted
Table 4.
Parameter
VDD to GND
VSS to GND
VDD to VSS
VA, VB, VW to GND
Maximum Current
IWB, IWA Pulsed
IWB Continuous (RWB ≤ 1 kΩ, A Open)1
IWA Continuous (RWA ≤ 1 kΩ, B Open)1
IAB Continuous
(RAB = 1 kΩ/10 kΩ/50 kΩ/100 kΩ)1
Digital Inputs and Output Voltage to GND
Operating Temperature Range
Maximum Junction Temperature (TJMAX)
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
TSSOP-20 Thermal Resistance2 θJA
Rating
−0.3 V, +7 V
+0.3 V, −7 V
7V
VSS, VDD
±20 mA
±5 mA
±5 mA
±5 mA/±500 µA/
±100 µA/±50 µA
0 V, 7 V
−40°C to +105°C
150°C
−65°C to +150°C
300°C
215°C
220°C
143°C/W
1 Maximum terminal current is bound by the maximum applied voltage across
any two of the A, B, and W terminals at a given resistance, the maximum
current handling of the switches, and the maximum power dissipation of the
package. VDD = 5 V.
2 Package power dissipation = (TJMAX − TA)/θJA.
Data Sheet
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. C | Page 8 of 32







AD5253 equivalent, schematic
AD5253/AD5254
RDAC/EEMEM Write
Setting the wiper position requires an RDAC write operation.
The single write operation is shown in Figure 27, and the
consecutive write operation is shown in Figure 28. In the
consecutive write operation, if the RDAC is selected and the
address starts at 0, the first data byte goes to RDAC0, the second
data byte goes to RDAC1, the third data byte goes to RDAC2,
and the fourth data byte goes to RDAC3. This operation can be
continued for up to eight addresses with four unused addresses;
it then loops back to RDAC0. If the address starts at any of the
eight valid addresses, N, the data first goes to RDAC_N,
RDAC_N + 1, and so on; it loops back to RDAC0 after the
eighth address. The RDAC address is shown in Table 6.
While the RDAC wiper setting is controlled by a specific
RDAC register, each RDAC register corresponds to a specific
EEMEM location, which provides nonvolatile wiper storage
functionality. The addresses are shown in Table 7. The single
and consecutive write operations also apply to EEMEM write
operations.
There are 12 nonvolatile memory locations: EEMEM4 to
EEMEM15. Users can store 12 bytes of information, such as
memory data for other components, look-up tables, or system
identification information.
In a write operation to the EEMEM registers, the device disables
the I2C interface during the internal write cycle. Acknowledge
polling is required to determine the completion of the write
cycle. See the EEMEM Write-Acknowledge Polling section.
RDAC/EEMEM Read
The AD5253/AD5254 provide two different RDAC or EEMEM
read operations. For example, Figure 29 shows the method of
reading the RDAC0 to RDAC3 contents without specifying the
address, assuming Address RDAC0 was already selected in the
previous operation. If an RDAC_N address other than RDAC0
was previously selected, readback starts with Address N,
followed by N + 1, and so on.
Figure 30 illustrates a random RDAC or EEMEM read
operation. This operation allows users to specify which RDAC
or EEMEM register is read by issuing a dummy write command
to change the RDAC address pointer and then proceeding with
the RDAC read operation at the new address location.
Data Sheet
Table 7. Addresses for Writing (Storing) RDAC Settings and
User-Defined Data to EEMEM Registers
(R/W = 0, CMD/REG = 0, EE/RDAC = 1)
A4 A3 A2 A1 A0 Data Byte Description
0 0 0 0 0 Store RDAC0 setting to EEMEM01
0 0 0 0 1 Store RDAC1 setting to EEMEM11
0 0 0 1 0 Store RDAC2 setting to EEMEM21
0 0 0 1 1 Store RDAC3 setting to EEMEM31
0 0 1 0 0 Store user data to EEMEM4
0 0 1 0 1 Store user data to EEMEM5
0 0 1 1 0 Store user data to EEMEM6
0 0 1 1 1 Store user data to EEMEM7
0 1 0 0 0 Store user data to EEMEM8
0 1 0 0 1 Store user data to EEMEM9
0 1 0 1 0 Store user data to EEMEM10
0 1 0 1 1 Store user data to EEMEM11
0 1 1 0 0 Store user data to EEMEM12
0 1 1 0 1 Store user data to EEMEM13
0 1 1 1 0 Store user data to EEMEM14
0 1 1 1 1 Store user data to EEMEM15
Table 8. Addresses for Reading (Restoring) RDAC Settings
and User Data from EEMEM
(R/W = 1, CMD/REG = 0, EE/RDAC = 1)
A4 A3 A2 A1 A0 Data Byte Description
0 0 0 0 0 Read RDAC0 setting from EEMEM0
0 0 0 0 1 Read RDAC1 setting from EEMEM1
0 0 0 1 0 Read RDAC2 setting from EEMEM2
0 0 0 1 1 Read RDAC3 setting from EEMEM3
0 0 1 0 0 Read User data from EEMEM4
0 0 1 0 1 Read user data from EEMEM5
0 0 1 1 0 Read user data from EEMEM6
0 0 1 1 1 Read user data from EEMEM7
0 1 0 0 0 Read user data from EEMEM8
0 1 0 0 1 Read user data from EEMEM9
0 1 0 1 0 Read user data from EEMEM10
0 1 0 1 1 Read user data from EEMEM11
0 1 1 0 0 Read user data from EEMEM12
0 1 1 0 1 Read user data from EEMEM13
0 1 1 1 0 Read user data from EEMEM14
0 1 1 1 1 Read user data from EEMEM15
1 Users can store any of the 64 RDAC settings for AD5253 or any of the 256
RDAC settings for the AD5254 directly to the EEMEM. This is not limited to
current RDAC wiper setting.
Rev. C | Page 16 of 32










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