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PDF ( 数据手册 , 数据表 ) AD5222

零件编号 AD5222
描述 Increment/Decrement Dual Digital Potentiometer
制造商 Analog Devices
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AD5222 数据手册, 描述, 功能
a
FEATURES
128-Position, 2-Channel
Potentiometer Replacement
10 k, 50 k, 100 k, 1 M
Very Low Power: 40 A Max
؎2.7 V Dual Supply Operation or
2.7 V to 5.5 V Single Supply Operation
Increment/Decrement Count Control
APPLICATIONS
Stereo Channel Audio Level Control
Mechanical Potentiometer Replacement
Remote Incremental Adjustment Applications
Instrumentation: Gain, Offset Adjustment
Programmable Voltage-to-Current Conversion
Line Impedance Matching
Increment / Decrement
Dual Digital Potentiometer
AD5222
FUNCTIONAL BLOCK DIAGRAM
VDD AD5222
U/D
UP/DOWN
COUNTER
DECODE
CS
MODE
DACSEL
CLK
GND
POR
DAC
SELECT
AND
ENABLE
UP/DOWN
COUNTER
DECODE
A1
W1
B1
A2
W2
B2
VSS
GENERAL DESCRIPTION
The AD5222 provides a dual channel, 128-position, digitally
controlled variable-resistor (VR) device. This device performs
the same electronic adjustment function as a potentiometer or
variable resistor. These products were optimized for instrument
and test equipment push-button applications. Choices between
bandwidth or power dissipation are available as a result of the
wide selection of end-to-end terminal resistance values.
The AD5222 contains two fixed resistors with wiper contacts that
tap the fixed resistor value at a point determined by a digitally
controlled up/down counter. The resistance between the wiper
and either end point of the fixed resistor provides a constant
resistance step size that is equal to the end-to-end resistance
divided by the number of positions (e.g., R STEP = 10 k/128 =
78 ). The variable resistor offers a true adjustable value of
resistance, between Terminal A and the wiper, or Terminal B
and the wiper. The fixed A-to-B terminal resistance of 10 k,
50 k, 100 k, or 1 Mhas a nominal temperature coefficient
of –35 ppm/°C.
The chip select CS, count CLK and U/D direction control inputs
set the variable resistor position. The MODE determines whether
both VRs are incremented together or independently. With
MODE at logic zero, both wipers are incremented UP or DOWN
without changing the relative settings between the wipers. Also,
the relative ratio between the wipers is preserved if either wiper
reaches the end of the resistor array. In the independent MODE
(Logic 1) only the VR determined by the DACSEL pin is changed.
DACSEL (Logic 0) changes RDAC 1. These inputs, which con-
trol the internal up/down counter, can be easily generated with
mechanical or push-button switches (or other contact closure
devices). This simple digital interface eliminates the need for
microcontrollers in front panel interface designs.
The AD5222 is available in the surface-mount (SO-14) package.
For ultracompact solutions, selected models are available in the
thin TSSOP-14 package. All parts are guaranteed to operate
over the extended industrial temperature range of –40°C to
+85°C. For 3-wire, SPI-compatible interface applications, see
the AD5203/AD5204/AD5206, AD7376, and AD8400/AD8402/
AD8403 products.
U/D
INCREMENT
5V
CS
U/D
CLK
VDD
A1
W1
B1
DACSEL
MODE
GND
A2
W2
B2
VSS
Figure 1. Typical Push-Button Control Application
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999







AD5222 pdf, 数据表
AD5222
OPERATION
The AD5222 provides a 128-position, digitally-controlled, variable
resistor (VR) device. Changing the VR settings is accomplished
by pulsing the CLK pin while CS is active low. The U/D (UP/
DOWN) control input pin controls the direction of the increment.
When the wiper hits the end of the resistor (Terminal A or B)
additional CLK pulses no longer change the wiper setting. The
wiper position is immediately decoded by the wiper decode logic
changing the wiper resistance. Appropriate debounce circuitry is
required when push-button switches are used to control the
count sequence and direction of count. The exact timing require-
ments are shown in Figure 2. The AD5222 powers ON in a
centered wiper position, exhibiting nearly equal resistances of
RWA and RWB.
VDD AD5222
U/D
UP/DOWN
COUNTER
DECODE
CS
MODE
DACSEL
CLK
GND
POR
DAC
SELECT
AND
ENABLE
UP/DOWN
COUNTER
DECODE
A1
W1
B1
A2
W2
B2
VSS
Figure 29. Block Diagram
DIGITAL INTERFACING OPERATION
The AD5222 contains a push-button controllable interface. The
active inputs are clock (CLK), CS and up/down (U/D). While
the MODE, and DACSEL pins control common updates or
individual updates. The negative-edge sensitive CLK input
requires clean transitions to avoid clocking multiple pulses into
the internal UP/DOWN counter register, Figure 30. Standard
logic families work well. If mechanical switches are used for
product evaluation a flip-flop or other suitable means should
debounce them. When CS is taken active low, the clock begins
to increment or decrement the internal up/down counter, depen-
dent upon the state of the U/D control pin. The UP/DOWN
counter value (D) starts at 40H at system power ON. Each new
CLK pulse will increment the value of the internal counter by
1 LSB until the full-scale value of 7FH is reached, as long as the
U/D pin is logic high. If the U/D pin is taken to logic low, the
counter will count down, stopping at code 00H (zero-scale).
Additional clock pulses on the CLK pin are ignored when the
wiper is at either the 00H position or the 7FH position. The
detailed digital logic interface circuitry is shown in Figure 30.
U/D
DACSEL
MODE
RDAC 1
U/D
COUNTER
CS
CLK
RDAC 2
U/D
COUNTER
Figure 30. Detailed Digital Logic Interface Circuit
All digital inputs (CS, U/D, CLK, MODE, DACSEL) are
protected with a series input resistor and parallel Zener ESD
structure shown in Figure 31. All potentiometer terminal pins
(A, B, W) are protected from ESD as shown in Figure 32.
1k
VSS
LOGIC
Figure 31. Equivalent ESD Protection Digital Pins
20
A, B, W
VSS
Figure 32. Equivalent ESD Protection Analog Pins
RS
D0 RS
D1
D2
D3 RS
D4
D5
D6
RDAC
UP/DOWN
CNTR
&
DECODE
A
W
RS
RS = RNOMINAL/128
B
Figure 33. AD5222 Equivalent RDAC Circuit
–8– REV. 0














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