DataSheet8.cn


PDF ( 数据手册 , 数据表 ) AD641

零件编号 AD641
描述 250 MHz Demodulating Logarithmic Amplifier
制造商 Analog Devices
LOGO Analog Devices LOGO 


1 Page

No Preview Available !

AD641 数据手册, 描述, 功能
a
250 MHz Demodulating
Logarithmic Amplifier
AD641
FEATURES
Logarithmic Amplifier Performance
Usable to 250 MHz
44 dB Dynamic Range
؎2.0 dB Log Conformance
37.5 mV/dB Voltage Output
Stable Slope and Intercepts
2.0 nV/Hz Input Noise Voltage
50 V Input Offset Voltage
Low Power
؎5 V Supply Operation
9 mA (+VS), 35 mA (–VS) Quiescent Current
Onboard Resistors
Onboard 10؋ Attenuator
Dual Polarity Current Outputs
Direct Coupled Differential Signal Path
APPLICATIONS
IF/RF Signal Processing
Received Signal Strength Indicator (RSSI)
High Speed Signal Compression
High Speed Spectrum Analyzer
ECM/Radar
PRODUCT DESCRIPTION
The AD641 is a 250 MHz, demodulating logarithmic amplifier
with an accuracy of ± 2.0 dB and 44 dB dynamic range. The
AD641 uses a successive detection architecture to provide an
output current that is logarithmically proportional to its input
voltage. The output current can be converted to a voltage using
one of several on-chip resistors to select the slope. A single
AD641 provides up to 44 dB of dynamic range at speeds up to
250 MHz, and two cascaded AD641s together can provide
58 dB of dynamic range at speeds up to 250 MHz. The AD641
is fully stable and well characterized over either the industrial or
military temperature ranges.
The AD641 is not a logarithmic building block, but rather a
complete logarithmic solution for compressing and measuring
wide dynamic range signals. The AD641 is comprised of five
stages and each stage has a full wave rectifier, whose current
depends on the absolute value of its input voltage. The output
of these stages are summed together to provide the demodulated
output current scaled at 1 mA per decade (50 µA/dB).
Without utilizing the 10× input attenuator, log conformance of
2.0 dB is maintained over the input range –44 dBm to 0 dBm.
The attenuator offers the most flexibility without significantly
impacting performance.
PIN CONFIGURATIONS
20-Lead Plastic DIP (N)
20-Lead Cerdip (Q)
–INPUT 1
20 +INPUT
ATN LO 2
19 ATN OUT
ATN COM 3
18 CKT COM
ATN COM 4
17 RG1
ATN IN
BL1
–VS
5 AD641 16 RG0
6 TOP VIEW 15 RG2
(Not to Scale)
7 14 LOG OUT
ITC 8
13 LOG COM
BL2 9
–OUTPUT 10
12 +VS
11 +OUTPUT
20-Lead PLCC (P)
ATN COM 4
ATN IN 5
BL1 6
–VS 7
ITC 8
3 2 1 20 19
PIN 1
18 CKT COM
IDENTIFIER
AD641
TOP VIEW
17 RG1
16 RG0
(Not to Scale)
15 RG2
14 LOG OUT
9 10 11 12 13
The 250 MHz bandwidth and temperature stability make this
product ideal for high speed signal power measurement in RF/
IF systems. ECM/Radar and Communication applications are
routinely in the 100 MHz–180 MHz range for power measure-
ment. The bandwidth and accuracy, as well as dynamic range,
make this part ideal for high speed, wide dynamic range signals.
The AD641 is offered in industrial (–40°C to +85°C) and mili-
tary (–55°C to +125°C) package temperature ranges. Industrial
versions are available in plastic DIP and PLCC; MIL versions
are packaged in cerdip.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999







AD641 pdf, 数据表
AD641
FUNDAMENTALS OF LOGARITHMIC CONVERSION
The conversion of a signal to its equivalent logarithmic value
involves a nonlinear operation, the consequences of which can be
very confusing if not fully understood. It is important to realize
from the outset that many of the familiar concepts of linear
circuits are of little relevance in this context. For example, the
incremental gain of an ideal logarithmic converter approaches
infinity as the input approaches zero. Further, an offset at the
output of a linear amplifier is simply equivalent to an offset at
the input, while in a logarithmic converter it is equivalent to a
change of amplitude at the input—a very different relationship.
We assume a dc signal in the following discussion to simplify the
concepts; ac behavior and the effect of input waveform on cali-
bration are discussed later. A logarithmic converter having a
voltage input VIN and output VOUT must satisfy a transfer func-
tion of the form
VOUT = VY LOG (VIN/VX)
Equation (1)
where VY and VX are fixed voltages which determine the scaling
of the converter. The input is divided by a voltage because the
argument of a logarithm has to be a simple ratio. The logarithm
must be multiplied by a voltage to develop a voltage output.
These operations are not, of course, carried out by explicit com-
putational elements, but are inherent in the behavior of the
converter. For stable operation, VX and VY must be based on
sound design criteria and rendered stable over wide temperature
and supply voltage extremes. This aspect of RF logarithmic
amplifier design has traditionally received little attention.
When VIN = VX, the logarithm is zero. VX is, therefore, called
the Intercept Voltage, because a graph of VOUT versus LOG
(VIN)—ideally a straight line—crosses the horizontal axis at this
point (see Figure 20). For the AD641, VX is calibrated to ex-
actly 1 mV. The slope of the line is directly proportional to VY.
Base 10 logarithms are used in this context to simplify the rela-
tionship to decibel values. For VIN = 10 VX, the logarithm has a
value of 1, so the output voltage is VY. At VIN = 100 VX, the
output is 2 VY, and so on. VY can therefore be viewed either as
the Slope Voltage or as the Volts per Decade Factor.
The AD641 conforms to Equation (1) except that its two out-
puts are in the form of currents, rather than voltages:
IOUT = IY LOG (VIN/VX)
Equation (2)
VYLOG (VIN/VX)
2VY
IDEAL
ACTUAL
SLOPE = VY
YY
+
0
ACTUAL
VIN = VX
IDEAL
VIN = 10VX
VIN = 100VX
INPUT ON
LOG SCALE
Figure 20. Basic DC Transfer Function of the AD641
IY, the Slope Current, is 1 mA. The current output can readily
be converted to a voltage with a slope of 1 V/decade, for ex-
ample, using one of the 1 kresistors provided for this purpose,
in conjunction with an op amp, as shown in Figure 21.
1mA PER DECADE
R1
48.7
R2
C1
330pF
15 14 13 12 11
LOG LOG +VS SIG
OUT COM
+OUT
AD641
SIG
–VS ITC BL2 –OUT
6 7 8 9 10
AD846
OUTPUT VOLTAGE
1V PER DECADE
FOR R2 = 1k
100mV PER dB
FOR R2 = 2k
Figure 21. Using an External Op Amp to Convert the
AD641 Output Current to a Buffered Voltage Output
Intercept Stabilization
Internally, the intercept voltage is a fraction of the thermal volt-
age kT/q, that is, VX = VXOT/TO, where VXO is the value of VX
at a reference temperature TO. So the uncorrected transfer
function has the form:
IOUT = IY LOG (VIN TO/VXOT)
Equation (3)
Now, if the amplitude of the signal input VIN could somehow be
rendered PTAT, the intercept would be stable with tempera-
ture, since the temperature dependence in both the numerator
and denominator of the logarithmic argument would cancel.
This is what is actually achieved by interposing the on-chip
attenuator, which has the necessary temperature dependence to
cause the input to the first stage to vary in proportion to abso-
lute temperature. The end limits of the dynamic range are now
totally independent of temperature. Consequently, this is the pre-
ferred method of intercept stabilization for applications where
the input signal is sufficiently large.
When the attenuator is not used, the PTAT variation in VX will
result in the intercept being temperature dependent. Near 300K
(+27°C) it will vary by 20 LOG (301/300) dB/°C, about 0.03 dB/
°C. Unless corrected, the whole output function would drift up
or down by this amount with changes in temperature. In the
AD641 a temperature compensating current IYLOG(T/TO) is
added to the output. This effectively maintains a constant inter-
cept VXO. This correction is active in the default state (Pin 8
open circuited). When using the attenuator, Pin 8 should be
grounded, which disables the compensation current. The drift
term needs to be compensated only once; when the outputs of
two AD641s are summed, Pin 8 should be grounded on at least
one of the two devices (both if the attenuator is used).
Conversion Range
Practical logarithmic converters have an upper and lower limit
on the input, beyond which errors increase rapidly. The upper
limit occurs when the first stage in the chain is driven into limit-
ing. Above this, no further increase in the output can occur and
the transfer function flattens off. The lower limit arises because
a finite number of stages provide finite gain, and therefore at
low signal levels the system becomes a simple linear amplifier.
–8– REV. C







AD641 equivalent, schematic
AD641
20-Lead Plastic DIP
(N-20)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
20-Lead Cerdip
(Q-20)
1.060 (26.90)
0.925 (23.50)
20
1
PIN 1
0.210 (5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
0.100
(2.54)
BSC
11 0.280 (7.11)
10 0.240 (6.10)
0.325 (8.25)
0.060 (1.52) 0.300 (7.62)
0.015 (0.38)
0.195 (4.95)
0.130
(3.30)
MIN
0.070 (1.77) SEATING
0.045 (1.15) PLANE
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.005 (0.13) MIN
0.098 (2.49) MAX
20
PIN 1
1
11
0.310 (7.87)
10 0.220 (5.59) 0.320 (8.13)
1.060 (25.92) MAX
0.060 (1.52)
0.290 (7.37)
0.200 (5.08)
0.015 (0.38)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.100
(2.54)
BSC
0.150
(3.81)
MIN
0.070 (1.78) SEATING
0.030 (0.76) PLANE
15°
0.015 (0.38)
0.008 (0.20)
20-Lead PLCC
(P-20A)
0.048 (1.21)
0.042 (1.07)
0.056 (1.42)
0.042 (1.07)
0.048 (1.21)
0.042 (1.07)
3 19
4
PIN 1
18
IDENTIFIER
TOP VIEW
(PINS DOWN)
0.050
(1.27)
BSC
0.020
(0.50)
R
8
9
14
13
0.356 (9.04)
0.350 (8.89)SQ
00.3.39855((190.7.082))SQ
0.180 (4.57)
0.165 (4.19)
0.025 (0.63)
0.015 (0.38)
0.021 (0.53)
0.013 (0.33)
0.330 (8.38)
0.032 (0.81) 0.290 (7.37)
0.026 (0.66)
0.040 (1.01)
0.025 (0.64)
0.110 (2.79)
0.085 (2.16)
–16–
REV. C










页数 16 页
下载[ AD641.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
AD640DC-Coupled Demodulating 120 MHz Logarithmic AmplifierAnalog Devices
Analog Devices
AD6402IF Transceiver SubsystemAnalog Devices
Analog Devices
AD641250 MHz Demodulating Logarithmic AmplifierAnalog Devices
Analog Devices
AD6411DECT RF TransceiverAnalog Devices
Analog Devices

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap