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PDF ( 数据手册 , 数据表 ) AD8022

零件编号 AD8022
描述 Low Noise Op Amp
制造商 Analog Devices
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AD8022 数据手册, 描述, 功能
Data Sheet
FEATURES
Low power amplifiers provide low noise and low distortion,
ideal for xDSL modem receiver
Wide supply range: +5 V, ±2.5 V to ±12 V voltage supply
Low power consumption: 4.0 mA/Amp
Voltage feedback
Ease of Use
Lower total noise (insignificant input current noise
contribution compared to current feedback amps)
Low noise and distortion
2.5 nV/√Hz voltage noise @ 100 kHz
1.2 pA/√Hz current noise
MTPR < −66 dBc (G = +7)
SFDR 110 dB @ 200 kHz
High speed
130 MHz bandwidth (−3 dB), G = +1
Settling time to 0.1%, 68 ns
50 V/μs slew rate
High output swing: ±10.1 V on ±12 V supply
Low offset voltage, 1.5 mV typical
APPLICATIONS
Receiver for ADSL, VDSL, HDSL, and proprietary
xDSL systems
Low noise instrumentation front end
Ultrasound preamps
Active filters
16-bit ADC buffers
GENERAL DESCRIPTIONS
The AD8022 consists of two low noise, high speed, voltage
feedback amplifiers. Each amplifier consumes only 4.0 mA of
quiescent current, yet has only 2.5 nV/√Hz of voltage noise.
These dual amplifiers provide wideband, low distortion
performance, with high output current optimized for stability
when driving capacitive loads. Manufactured on ADI’s high
voltage generation of XFCB bipolar process, the AD8022
operates on a wide range of supply voltages. The AD8022 is
available in both an 8-lead MSOP and an 8-lead SOIC. Fast over
voltage recovery and wide bandwidth make the AD8022 ideal as
the receive channel front end to an ADSL, VDSL, or proprietary
xDSL transceiver design.
In an xDSL line interface circuit, the AD8022’s op amps can be
configured as the differential receiver from the line transformer
or as independent active filters.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
Dual High Speed,
Low Noise Op Amp
AD8022
FUNCTIONAL BLOCK DIAGRAM
OUT1 1
–IN1 2
+IN1 3
–VS 4
AD8022
+
+
8 +VS
7 OUT2
6 –IN2
5 +IN2
Figure 1.
100
10
eN (nV/ Hz)
iN (pA/ Hz)
1
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 2. Current and Voltage Noise vs. Frequency
10M
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.







AD8022 pdf, 数据表
Data Sheet
80
70
60
50
40
30
20
10
0
–10
5k 10k
100k
1M 10M
FREQUENCY (Hz)
100M
Figure 10. Open-Loop Gain vs. Frequency
500M
180
0
100mV
100
90
AD8022
100ns
INPUT
10
0%
100mV
OUTPUT
Figure 13. Noninverting Small Signal Pulse Response,
RL = 500 Ω, VS = ±2.5 V, G = +1, RF = 0 Ω
2.00V
100
90
100ns
INPUT
–180
5k 10k
100k
1M 10M
FREQUENCY (Hz)
100M
Figure 11. Open-Loop Phase vs. Frequency
500M
100mV
100
90
100ns
INPUT
10
0%
2.00V
OUTPUT
Figure 14. Noninverting Large Signal Pulse Response,
RL = 500 Ω, VS = ±12 V, G = +1, RF = 0 Ω
1.00V
100
90
100ns
INPUT
10
0%
100mV
OUTPUT
Figure 12. Noninverting Small Signal Pulse Response,
RL = 500 Ω, VS = ±12 V, G = +1, RF = 0 Ω
10
0%
1.00V
OUTPUT
Figure 15. Noninverting Large Signal Pulse Response,
RL = 500 Ω, VS = ±2.5 V, G = +1, RF = 0 Ω
Rev. C | Page 7 of 16







AD8022 equivalent, schematic
Data Sheet
+VIN
COMMON-
MODE
VOLTAGE
–VIN
6800pF
5% NPO
191Ω
1%
243Ω
1%
8200pF
10%
SIGNAL CM LEVEL
0.1μF
16V
10%
X7R
8200pF
10%
191Ω
1%
243Ω
1%
12V
3 8 AD8022
1
2
422Ω
1%
0.1μF
50V
5%
NPO
249Ω
1%
249Ω
1%
6
7
5
4 AD8022
7.5
2.5
–2.5
–7.5
–12.5
–17.5
–22.5
–27.5
–32.5
–37.5
–42.5
10k
6800pF
5% NPO
Figure 41. Differential Input Sallen-Key Filter
Using AD8022 on Single Supply, +12 V
100k
1M
FREQUENCY (Hz)
Figure 42. Frequency Response of Sallen-Key Filter
+VOUT
–VOUT
10M
AD8022
LAYOUT CONSIDERATIONS
As is the case with all high speed amplifiers, careful attention to
printed circuit board layout details prevent associated board
parasitics from becoming problematic. Proper RF design
technique is mandatory. The PCB should have a ground plane
covering all unused portions of the component side of the
board to provide a low impedance return path. Removing the
ground plane from the area near the input signal lines reduces
stray capacitance. Chip capacitors should be used for supply
bypassing. One end of the capacitor should be connected to the
ground plane, and the other should be connected no more than
1/8 inch away from each supply pin. An additional large
(0.47 μF to 10 μF) tantalum capacitor should be connected in
parallel, although not necessarily as close, in order to supply
current for fast, large signal changes at the AD8022 output.
Signal lines connecting the feedback and gain resistors should
be as short as possible, minimizing the inductance and stray
capacitance associated with these traces. Locate termination
resistors and loads as close as possible to the input(s) and
output, respectively. Adhere to stripline design techniques for
long signal traces (greater than about 1 inch). Following these
generic guidelines improves the performance of the AD8022 in
all applications.
Rev. C | Page 15 of 16










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