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零件编号 | AD8019 | ||
描述 | DSL Line Driver with Power-Down | ||
制造商 | Analog Devices | ||
LOGO | |||
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FEATURES
Low Distortion, High Output Current Amplifiers
Operate from 12 V to ؎12 V Power Supplies,
Ideal for High-Performance ADSL CPE, and xDSL
Modems
Low Power Operation
9 mA/Amp (Typ) Supply Current
Digital (1-Bit) Power-Down
Voltage Feedback Amplifiers
Low Distortion
Out-of-Band SFDR –80 dBc @ 100 kHz into 100 ⍀ Line
High Speed
175 MHz Bandwidth (–3 dB), G = +1
400 V/s Slew Rate
High Dynamic Range
VOUT to within 1.2 V of Power Supply
APPLICATIONS
ADSL, VDSL, HDSL, and Proprietary xDSL USB, PCI,
PCMCIA Modems, and Customer Premise Equipment
(CPE)
PRODUCT DESCRIPTION
The AD8019 is a low cost xDSL line driver optimized to drive a
minimum of 13 dBm into a 100 Ω load while delivering outstand-
ing distortion performance. The AD8019 is designed on a 24 V
high-speed bipolar process enabling the use of ± 12 V power
supplies or 12 V only. When operating from a single 12 V sup-
ply the highly efficient amplifier architecture can typically deliver
170 mA output current into low impedance loads through a
1:2 turns ratio transformer. Hybrid designs using ± 12 V supplies
enable the use of a 1:1 turns ratio transformer, minimizing attenu-
ation of the receive signal. The AD8019 typically draws 9 mA/
amplifier quiescent current. A 1-bit digital power down feature
reduces the quiescent current to approximately 1.6 mA/amplifier.
Figure 1 shows typical Out of Band SFDR performance under
ADSL CPE (upstream) conditions. SFDR is measured while
driving a 13 dBm ADSL DMT signal into a 100 Ω line with
50 Ω back termination.
The AD8019 comes in thermally enhanced 8-lead SOIC and
14-lead TSSOP packages. The 8-lead SOIC is pin-compatible
with the AD8017 12 V line driver.
DSL Line Driver
with Power-Down
AD8019
PIN CONFIGURATIONS
8-Lead SOIC
(R-8)
14-Lead TSSOP
(RU-14)
OUT1 1 AD8019AR 8 +VS
–IN1 2
7 OUT2
+IN1 3
6 –IN2
–VS 4
5 +IN2
NC 1
OUT1 2
–IN1 3
AD8019ARU 14 NC
13 +VS
12 OUT2
+IN1 4
11 –IN2
–VS 5
PWDN 6
10 +IN2
9 NC
NC 7
8 DGND
NC = NO CONNECT
–80dBc
132.5
137.5
FREQUENCY – kHz
142.5
Figure 1. Out-of-Band SFDR; VS = ±12 V; 13 dBm Output
Power into 200 Ω, Upstream
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001
AD8019
–10
–20
–30
–PSRR
–40
–50
+PSRR
–60
–70
–80
–90
0.01
0.1 1 10 100
FREQUENCY – MHz
1000
TPC 19. PSRR vs. Frequency; RL = 100 Ω
100
VNOISE
10
+INOISE
1
–INOISE
100
10
1
0.1
0.01
0.1 1 10 100
FREQUENCY – kHz
TPC 20. Noise vs. Frequency
0.1
1000
–20
–30
–40
–50
–60
–70
–80
–90
–100
0.01
0.1 1 10 100
FREQUENCY – MHz
1000
TPC 22. Crosstalk vs. Frequency, VS = ±12 V, VS = ±6 V;
G = +2; VIN = 10 dBm
120
110
100
90
80
70
60
50
40
30
20
10
0
–10
–20
0.001
500⍀
50⍀ 10⍀
10⍀
2k⍀
50⍀
50⍀
270
225
50⍀
50⍀ 180
AOL
135
PHASE
90
45
0
0.01
0.1 1 10
FREQUENCY – MHz
–45
100 1000
TPC 23. Open-Loop Gain and Phase vs. Frequency
VIN
VOUT
6.8pF
1.1k⍀ 1.1k⍀
VIN
50⍀
50⍀
VOUT
50⍀
20ns/DIV
TPC 21. Settling Time 0.1%; VS = ±12 V, RL = 100 Ω,
VOUT = 2 V p-p
VIN
VOUT
6.8pF
1.1k⍀ 1.1k⍀
VIN
50⍀
50⍀
VOUT
50⍀
20ns/DIV
TPC 24. Settling Time 0.1%; VS = ±6 V, RL = 100 Ω,
VOUT = 2 V p-p
–8– REV. 0
AD8019
VCC
R25
VAL
R26
VAL
1
JP1 A 2
B
3
R27
VAL
C24
VAL
9 NC4
U1 AD8019
6 PWDN
DGND NC1 NC2 NC3
8 1 7 14
Figure 9. DSL Driver Input Control Circuit
Figure 11. TSSOP Evaluation Board Silkscreen Bottom
AGND
AGND
Figure 10. TSSOP Evaluation Board Silkscreen Top
2
Figure 12. TSSOP Evaluation Board Power Plane
–16–
REV. 0
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页数 | 20 页 | ||
下载 | [ AD8019.PDF 数据手册 ] |
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