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PDF ( 数据手册 , 数据表 ) ADV7128

零件编号 ADV7128
描述 CMOS 80 MHz/ 10-Bit Video DAC
制造商 Analog Devices
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ADV7128 数据手册, 描述, 功能
a
CMOS
80 MHz, 10-Bit Video DAC
FEATURES
80 MHz Pipelined Operation
10-Bit D/A Converters
RS-343A/RS-170 Compatible Outputs
TTL Compatible Inputs
+5 V CMOS Monolithic Construction
28-Pin SOIC Package
APPLICATIONS
High Definition Television (HDTV)
High Resolution Color Graphics
Digital Radio Modulation
CAE/CAD/CAM Applications
Image Processing
Instrumentation
Video Signal Reconstruction
Direct Digital Synthesis (DDS) & I/O Modulation
Wireless LAN
Wireless Local Loop
SPEED GRADES
80 MHz
50 MHz
30 MHz
CLOCK
ADV7128
FUNCTIONAL BLOCK DIAGRAM
FS
VAA ADJUST VREF
ADV7128
REFERENCE
AMPLIFIER
COMP
D0
10
DATA
10
REGISTER
DAC
IOUT
D9
GND
GENERAL DESCRIPTION
The ADV7128 (ADV®) is a video speed, digital-to-analog con-
verter on a single monolithic chip. It consists of a high speed,
10-bit, video D/A converters; a standard TTL input interface;
and a high impedance, analog output, current source.
The ADV7128 has a 10-bit pixel input port. A single +5 V
power supply, an external 1.23 V reference and pixel clock input
are and all that are required to make the part operational.
The ADV7128 is capable of generating video output signals
which are compatible with RS-343A, RS-170 and most pro-
posed production system HDTV video standards, including
SMPTE 240M.
The ADV7128 is fabricated in a +5 V CMOS process. Its
monolithic CMOS construction ensures greater functionality
with low power dissipation. The ADV7128 is available in a 28-
lead small outline IC (SOIC).
PRODUCT HIGHLIGHTS
1. Fast video refresh rate, 80 MHz.
2. Guaranteed monotonic to 10 bits. Ten bits of resolution al-
lows for implementation of linearization functions such as
gamma correction and contrast enhancement.
3. Compatible with a wide variety of high resolution color
graphics systems including RS-343A/RS-170 and the pro-
posed SMPTE 240M standard for HDTV.
4. Combined with a numerically controlled oscillator (AD9955),
it forms a complete frequency synthesizer (DDS).
5. Using the parts reduced power output DAC modes, it is
ideal for power and cost sensitive communications type
applications.
ADV is a registered trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703







ADV7128 pdf, 数据表
ADV7128
It is important to note that while the ADV7128 contains cir-
cuitry to reject power supply noise, this rejection decreases with
frequency. If a high frequency switching power supply is used,
the designer should pay close attention to reducing power sup-
ply noise. A dc power supply filter (Murata BNX002) will pro-
vide EMI suppression between the switching power supply and
the main PCB. Alternatively, consideration could be given to
using a three terminal voltage regulator.
Digital Signal Interconnect
The digital signal lines to the ADV7128 should be isolated as
much as possible from the analog outputs and other analog cir-
cuitry. Digital signal lines should not overlay the analog power
plane.
Due to the high clock rates used, long clock lines to the
ADV7128 should be avoided so as to minimize noise pickup.
Any active pull-up termination resistors for the digital inputs
should be connected to the regular PCB power plane (VCC), and
not the analog power plane.
Analog Signal Interconnect
The ADV7128 should be located as close as possible to the out-
put connectors thus minimizing noise pickup and reflections
due to impedance mismatch.
The video output signals should overlay the ground plane, and
not the analog power plane, thereby maximizing the high fre-
quency power supply rejection.
For optimum performance, the analog outputs should each have
a source termination resistance to ground of 75 (doubly ter-
minated 75 configuration). This termination resistance should
be as close as possible to the ADV7128 so as to minimize
reflections.
Additional information on PCB design is available in an applica-
tion note entitled “Design and Layout of a Video Graphics Sys-
tem for Reduced EMI.” This application note is available from
Analog Devices, publication number E1309-15-10/89.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
SOIC (R-28)
28
0.299 (7.60)
0.291 (7.40)
PIN 1
1
15
0.419 (10.65)
0.394 (10.00)
14
0.011 (0.30)
0.004 (0.10)
0.712 (18.10)
0.697 (17.70)
0.050 (1.27)
BSC
0.019 (0.49)
0.014 (0.35)
0.104 (2.65)
0.093 (2.35)
0.012 (0.32)
0.009 (0.23)
0.05 (1.27)
0.016 (0.40)
–8– REV. 0














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