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零件编号 | UMC3NT1G | ||
描述 | Dual Common Base-Collector Bias Resistor Transistors | ||
制造商 | ON Semiconductor | ||
LOGO | |||
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UMC2NT1G,
NSVUMC2NT1G,
UMC3NT1G,
NSVUMC3NT1G,
UMC5NT1G,
NSVUMC5NT2G
Dual Common
Base-Collector Bias
Resistor Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The Bias Resistor Transistor (BRT) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the UMC2NT1G series, two
complementary BRT devices are housed in the SOT−353 package
which is ideal for low power surface mount applications where board
space is at a premium.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch/3000 Unit Tape and Reel
AEC−Q101 Qualified and PPAP Capable
NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant*
MAXIMUM RATINGS (TA = 25C unless otherwise noted, common for
Q1 and Q2, − minus sign for Q1 (PNP) omitted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current
IC 100 mAdc
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2011
December, 2011 − Rev. 10
1
http://onsemi.com
SC−88A/SOT−353
CASE 419A
STYLE 6
32
R1 R2
1
Q1
4
R2
R1
Q2
5
MARKING DIAGRAM
54
Ux M G
G
1 23
Ux = Device Marking
x = 2, 3 or 5
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
Publication Order Number:
UMC2NT1/D
UMC2NT1G, NSVUMC2NT1G, UMC3NT1G, NSVUMC3NT1G, UMC5NT1G,
NSVUMC5NT2G
TYPICAL ELECTRICAL CHARACTERISTICS — UMC3NT1G NPN TRANSISTOR
1
IC/IB = 10
0.1 TA = -25C
0.01
25C
75C
1000
100
VCE = 10 V
TA = 75C
25C
-25C
0.001
0
4
3
2
1
00
20 40
IC, COLLECTOR CURRENT (mA)
Figure 17. VCE(sat) versus IC
50
10
1
10
IC, COLLECTOR CURRENT (mA)
Figure 18. DC Current Gain
100
f = 1 MHz
IE = 0 mA
TA = 25C
100
10
1
75C 25C
TA = -25C
0.1
10 20 30 40
VR, REVERSE BIAS VOLTAGE (V)
Figure 19. Output Capacitance
0.01
0.001
50 0
2
46
VO = 5 V
8 10
Vin, INPUT VOLTAGE (V)
Figure 20. Output Current versus Input Voltage
100
VO = 0.2 V
10
1
TA = -25C
75C 25C
0.1
0 10
20
30 40 50
IC, COLLECTOR CURRENT (mA)
Figure 21. Input Voltage versus Output
Current
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页数 | 11 页 | ||
下载 | [ UMC3NT1G.PDF 数据手册 ] |
零件编号 | 描述 | 制造商 |
UMC3NT1G | Dual Common Base-Collector Bias Resistor Transistors | ON Semiconductor |
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