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PDF ( 数据手册 , 数据表 ) GP001-JCG12832A05-01

零件编号 GP001-JCG12832A05-01
描述 LCM MODULE
制造商 GEMINI
LOGO GEMINI LOGO 


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GP001-JCG12832A05-01 数据手册, 描述, 功能
FS-GP001-JCG12832A05-01 REV. A
(FFPNNMNG-06-ST-NSC)
MAR/2006
PAGE 1 OF 29
DOCUMENT NUMBER AND REVISION
FS-GP001-JCG12832A05-01 REV. A
(FFPNNMNG-06-ST-NSC)
DOCUMENT TITLE:F
SPECIFICATION
OF
LCD MODULE TYPE
CUSTOMER
MODEL NUMBER
CUSTOMER
APPROVAL
DATE
GP001-JCG12832A05-01
DEPARTMENT
PREPARED BY
CHECKED BY
APPROVED BY
NAME
ZHU LING JUN
SIGNATURE
XIE DAI ZHOU
WANG ZHAO CAI
DATE
www. FindLCD.com.







GP001-JCG12832A05-01 pdf, 数据表
FS-GP001-JCG12832A05-01 REV. A
(FFPNNMNG-06-ST-NSC)
MAR/2006
PAGE 7 OF 29
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Table 3(a)
Symbol
VDD
C86
VSS
V0
V1
V2
V3
V4
C2-
C2+
C1+
C1-
C3+
VOUT
VSS
D7
D6
D5
D4
D3
D2
D1
D0
/RD
Description
Power supply for logic +3.0V.
This is the MPU interface switch terminal.
C86 = “H”: 6800 Series MPU interface.
C86 = “L”: 8080 MPU interface.
Ground (0V).
This is a multi-level power supply for the liquid crystal drive. The voltage
Supply applied is determined by the liquid crystal cell, and is changed
through the use of a resistive voltage divided or through changing the
impedance using an op. amp. Voltage levels are determined based on
VSS, and must maintain the relative magnitudes shown below.
V0 V1 V2 V3 V4 VSS
When the power supply turns ON, the internal power supply circuits
produce the V1 to V4 voltages shown below. The voltage settings are
selected using the LCD bias set command.
V1=(1/5)V0, V2=(2/5)V1, V3=(3/5)V2, V4=(4/5)V0
DC/DC voltage converter. Connect a capacitor between this terminal and
the C2+ terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and
the C2- terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and
the C1+ terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and
the C1- terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and
the C1- terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and
VSS or VDD
Ground (0V).
This is an 8-bit bi-directional data bus that connects to an 8-bit or 16-bit
standard MPU data bus.
When the serial interface is selected (P/S = “L”):
D7 : serial data input (SI) ; D6 : the serial clock input (SCL).
D0 to D5 are set to high impedance.
When the chip select is not active, D0 to D7 are set to high impedance.
• When connected to an 8080 MPU, this is active LOW.
(E) This pin is connected to the /RD signal of the 8080 MPU, and the
ST7565P series data bus is in an output status when this signal is “L”.
• When connected to a 6800 Series MPU, this is active HIGH.
This is the 6800 Series MPU enable clock input terminal.







GP001-JCG12832A05-01 equivalent, schematic









页数 18 页
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