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PDF ( 数据手册 , 数据表 ) GA16JT17-247

零件编号 GA16JT17-247
描述 Junction Transistor
制造商 GeneSiC
LOGO GeneSiC LOGO 


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GA16JT17-247 数据手册, 描述, 功能
Normally OFF Silicon Carbide
Junction Transistor
Features
175 °C Maximum Operating Temperature
Gate Oxide Free SiC Switch
Exceptional Safe Operating Area
Excellent Gain Linearity
Temperature Independent Switching Performance
Low Output Capacitance
Positive Temperature Coefficient of RDS,ON
Suitable for Connecting an Anti-parallel Diode
Advantages
Compatible with Si MOSFET/IGBT Gate Drive ICs
> 20 µs Short-Circuit Withstand Capability
Lowest-in-class Conduction Losses
High Circuit Efficiency
Minimal Input Signal Distortion
High Amplifier Bandwidth
Package
RoHS Compliant
D
GA16JT17-247
VDS
RDS(ON)
ID (Tc = 25°C)
ID (Tc > 125°C)
hFE (Tc = 25°C)
=
=
=
=
=
1700 V
50 mΩ
45 A
20 A
96
G DS
TO-247
Applications
Down Hole Oil Drilling, Geothermal Instrumentation
Hybrid Electric Vehicles (HEV)
Solar Inverters
Switched-Mode Power Supply (SMPS)
Power Factor Correction (PFC)
Induction Heating
Uninterruptible Power Supply (UPS)
Motor Drives
Table of Contents
Section I: Absolute Maximum Ratings ...........................................................................................................1
Section II: Static Electrical Characteristics....................................................................................................2
Section III: Dynamic Electrical Characteristics .............................................................................................2
Section IV: Figures ...........................................................................................................................................3
Section V: Driving the GA16JT17-247.............................................................................................................7
Section VI: Package Dimensions ................................................................................................................. 11
Section VII: SPICE Model Parameters ......................................................................................................... 12
Section I: Absolute Maximum Ratings
Parameter
Drain Source Voltage
Continuous Drain Current
Continuous Drain Current
Continuous Gate Current
Turn-Off Safe Operating Area
Short Circuit Safe Operating Area
Reverse Gate Source Voltage
Reverse Drain Source Voltage
Power Dissipation
Storage Temperature
Symbol
VDS
ID
ID
IG
RBSOA
SCSOA
VSG
VSD
Ptot
Tstg
VGS = 0 V
TC = 25°C
TC > 125°C
Conditions
TVJ = 175 oC,
Clamped Inductive Load
TVJ = 175 oC, IG = 1 A, VDS = 1200 V,
Non Repetitive
TC = 25 °C / 155 °C, tp > 100 ms
Value
1700
45
20
1.3
ID,max = 16
@ VDS ≤ VDSmax
>20
30
25
282 / 37
-55 to 175
Unit
V
A
A
A
A
Notes
Fig. 17
Fig. 17
Fig. 19
µs
V
V
W Fig. 16
°C
Jan 2015
http://www.genesicsemi.com/commercial-sic/sic-junction-transistors/
Pg1 of 11







GA16JT17-247 pdf, 数据表
GA16JT17-247
Ideally, IG,pon should terminate when the drain voltage falls to its on-state value in order to avoid unnecessary drive losses during the steady
on-state. In practice, the rise time of the IG,on pulse is affected by the parasitic inductances, Lpar in the device package and drive circuit. A
voltage developed across the parasitic inductance in the source path, Ls, can de-bias the gate-source junction, when high drain currents begin
to flow through the device. The voltage applied to the gate pin should be maintained high enough, above the VGS,sat (see Figure 7) level to
counter these effects.
A high negative peak current, -IG,off is recommended at the start of the turn-off transition, in order to rapidly sweep out the injected carriers from
the gate, and achieve rapid turn-off. While satisfactory turn off can be achieved with VGS = 0 V, a negative gate voltage VGS may be used in
order to speed up the turn-off transition.
Two high-speed drive topologies for the SiC SJTs are presented below.
B:1: High Speed, Low Loss Drive with Boost Capacitor, GA03IDDJT30-FR4
The GA16JT17-247 may be driven using a High Speed, Low Loss Drive with Boost Capacitor topology in which multiple voltage levels, a gate
resistor, and a gate capacitor are used to provide fast switching current peaks at turn-on and turn-off and a continuous gate current while in
on-state. A 3 kV isolated evaluation gate drive board (GA03IDDJT30-FR4) utilizing this topology is commercially available for high and low-
side driving, its datasheet provides additional details about this drive topology.
+12 V
Gate
Signal
+12 V
VCC High
C2
U3
VGL
C5
GA03IDDJT30-FR4
Gate Driver Board
VCC High RTN
Signal
R1
U1
U2
Signal RTN
VGL
R2
VEE C6
VGL
R3
VEE
VGH
U5
C9
VEE C10
VGL
U6
VEE
D1
C8
CG1
CG2
R4
RG1
RG2
VCC Low
C1
U4
VCC Low RTN
VGH
C3
C4
VEE
Voltage Isolation Barrier
Gate IG G
D
SiC SJT S
Source
Figure 24: Topology of the GA03IDDJT30-FR4 Two Voltage Source gate driver.
The GA03IDDJT30-FR4 evaluation board comes equipped with two on board gate drive resistors (RG1, RG2) pre-installed for an effective
gate resistance3 of RG = 3.75 Ω. It may be necessary for the user to reduce RG1 and RG2 under high drain current conditions for safe
operation of the GA16JT17-247. The steady state current supplied to the gate pin of the GA16JT17-247 with on-board RG = 3.75 Ω, is shown
in Figure 25. The maximum allowable safe value of RG for the user’s required drain current can be read from Figure 26.
For the GA16JT17-247, RG must be reduced for ID ≥ ~13 A for safe operation with the GA03IDDJT30-FR4.
For operation at ID ≥ ~13 A, RG may be calculated from the following equation, which contains the DC current gain hFE (Figure 6) and the gate-
source saturation voltage VGS,sat (Figure 7).
Jan 2015
http://www.genesicsemi.com/commercial-sic/sic-junction-transistors/
Pg8 of 11














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