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零件编号 | CY14E256LA | ||
描述 | 256-Kbit (32 K x 8) nvSRAM | ||
制造商 | Cypress Semiconductor | ||
LOGO | |||
1 Page
CY14E256LA
256-Kbit (32 K × 8) nvSRAM
256-Kbit (32 K × 8) nvSRAM
Features
■ 25 ns and 45 ns access times
■ Internally organized as 32 K × 8 (CY14E256LA)
■ Hands-off automatic STORE on power-down with only a small
capacitor
■ STORE to QuantumTrap nonvolatile elements initiated by
software, device pin, or autostore on power-down
■ RECALL to SRAM initiated by software or power-up
■ Infinite read, write, and RECALL cycles
■ 1 million STORE cycles to QuantumTrap
■ 20-year data retention
■ Single 5 V + 10% operation
■ Industrial temperature
■ 44-pin thin small-outline package (TSOP) Type II and 32-pin
small-outline integrated circuit (SOIC) package
■ Pb-free and restriction of hazardous substances (RoHS)
compliant
Functional Description
The Cypress CY14E256LA is a fast static RAM, with a
nonvolatile element in each memory cell. The memory is
organized as 32 KB. The embedded nonvolatile elements
incorporate QuantumTrap technology, producing the world’s
most reliable nonvolatile memory. The SRAM provides infinite
read and write cycles, while independent nonvolatile data
resides in the highly reliable QuantumTrap cell. Data transfers
from the SRAM to the nonvolatile elements (the STORE
operation) takes place automatically at power-down. On
power-up, data is restored to the SRAM (the RECALL operation)
from the nonvolatile memory. Both the STORE and RECALL
operations are also available under software control.
For a complete list of related documentation, click here.
Logic Block Diagram
A5
A6
A7
A8
A9
A 11
A 12
A 13
A 14
DQ 0
DQ 1
DQ 2
DQ 3
DQ 4
DQ 5
DQ 6
DQ 7
QuantumTrap
512 X 512
STORE
STATIC RAM
ARRAY
512 X 512
RECALL
COLUMN I/O
COLUMN DEC
A0 A1 A2 A3 A4 A10
VCC
VCAP
POWER
CONTROL
STORE/
RECALL
CONTROL
HSB
SOFTWARE
DETECT
-A13 A0
OE
CE
WE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-54952 Rev. *K
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 14, 2014
DC Electrical Characteristics (continued)
Over the Operating Range
Parameter
VCAP[11]
VVCAP[12, 13]
Description
Storage capacitor
Maximum voltage driven on
VCAP pin by the device
Test Conditions
Between VCAP pin and VSS
VCC = Max
CY14E256LA
Min Typ [9] Max Unit
61 68 180 F
– – VCC – 0.5 V
Data Retention and Endurance
Over the Operating Range
Parameter
DATAR
NVC
Data retention
Nonvolatile STORE operations
Description
Min
20
1,000
Unit
Years
K
Capacitance
Parameter[13]
CIN
COUT
Description
Input capacitance (except HSB)
Input capacitance (for HSB)
Output capacitance (except
HSB)
Output capacitance (for HSB)
Test Conditions
TA = 25 C, f = 1 MHz, VCC = VCC(Typ)
Max Unit
7 pF
8 pF
7 pF
8 pF
Thermal Resistance
Parameter[13]
Description
JA Thermal resistance
(Junction to ambient)
JC
Thermal resistance
(Junction to case)
Test Conditions
44-pin TSOP II
Test conditions follow standard test
methods and procedures for measuring
thermal impedance, in accordance with
EIA/JESD51.
41.74
11.90
32-pin SOIC
41.55
24.43
Unit
C/W
C/W
Notes
11. MiVsCianAlPwVaCisyAscPhrvaearclguoeemdgmtuoeanaradmnetdineietmosuuthmsaevtaothlcteaargpeeaiscdiuatorsrinuwgffiitachiiPennottwhceehrsa-pUrgepecRifaiEevadCilAmaLbinLleactnyocdclemomsaoxpltlehimtaetitasa.nsRuimeccfmeeresadspfiauptlelAicpuaottoiwoSnetorn-rdoeoteowpAneNrca4ytc3iol5en9.c3MafnoarxcomVmoCprAelPedtveeatlaauieslsugcoucnaerVsasCnfAtuePleAosupttthoioaSnttsoth.ree.cTahpearceitfoorreonit
12.
MtemaxpimeruamturveolrtaanggeeosnhVouClAdPbpeinhi(gVhVeCrAtPh)ains
provided for guidance
the VVCAP voltage.
when
choosing
the
VCAP
capacitor.
The
voltage
rating
of
the
VCAP
capacitor
across
the
operating
13. These parameters are guaranteed by design and are not tested
Document Number: 001-54952 Rev. *K
Page 8 of 19
Package Diagrams
Figure 13. 44-pin TSOP II Package Outline, 51-85087
CY14E256LA
Figure 14. 32-pin SOIC (300 Mil) Package Outline, 51-85127
51-85087 *E
Document Number: 001-54952 Rev. *K
51-85127 *C
Page 16 of 19
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页数 | 19 页 | ||
下载 | [ CY14E256LA.PDF 数据手册 ] |
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