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STK15C88 数据手册 PDF ( 256-Kbit (32 K x 8) PowerStore nvSRAM )

零件编号 STK15C88
描述 256-Kbit (32 K x 8) PowerStore nvSRAM
制造商 Cypress Semiconductor
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STK15C88 数据手册, 描述, 功能
STK15C88
256-Kbit (32 K × 8) PowerStore nvSRAM
256-Kbit (32 K × 8) PowerStore nvSRAM
Features
25 ns and 45 ns Access Times
Pin compatible with Industry Standard SRAMs
Automatic Nonvolatile STORE on power loss
Nonvolatile STORE under Software Control
Automatic RECALL to SRAM on Power Up
Unlimited Read/Write Endurance
Unlimited RECALL Cycles
1,000,000 STORE Cycles
100 year Data Retention
Single 5 V + 10% Power Supply
Commercial and Industrial Temperatures
28-pin (300 mil and 330 mil) SOIC packages
RoHS Compliance
Logic Block Diagram
Functional Description
The Cypress STK15C88 is a 256Kb fast static RAM with a
nonvolatile element in each memory cell. The embedded
nonvolatile elements incorporate QuantumTrap™ technology
producing the world’s most reliable nonvolatile memory. The
SRAM provides unlimited read and write cycles, while
independent, nonvolatile data resides in the highly reliable
QuantumTrap cell. Data transfers from the SRAM to the
nonvolatile elements (the STORE operation) takes place
automatically at power down. On power up, data is restored to
the SRAM (the RECALL operation) from the nonvolatile memory.
Both the STORE and RECALL operations are also available
under software control.
PowerStore nvSRAM products depend on the intrinsic system
capacitance to maintain system power long enough for an
automatic store on power loss. If the power ramp from 5 volts to
3.6 volts is faster than 10 ms, consider our 14C88 or 16C88 for
more reliable operation.
For a complete list of related documentation, click here.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-50593 Rev. *G
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 20, 2015




STK15C88 pdf, 数据表
STK15C88
Data Retention and Endurance
Parameter
DATAR
NVC
Description
Data Retention
Nonvolatile STORE Operations
Min
100
1,000
Unit
Years
K
Capacitance
In the following table, the capacitance parameters are listed.[4]
Parameter
CIN
COUT
Description
Input Capacitance
Output Capacitance
Test Conditions
TA = 25 C, f = 1 MHz,
VCC = 0 to 3.0 V
Max Unit
5 pF
7 pF
Thermal Resistance
In the following table, the thermal resistance parameters are listed.[4]
Parameter
JA
JC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
28-pin SOIC 28-pin SOIC
(300 mil) (330 mil)
Test conditions follow standard test methods and
procedures for measuring thermal impedance,
per EIA / JESD51.
TBD
TBD
TBD
TBD
Unit
C/W
C/W
Figure 4. AC Test Loads
5.0 V
R1 480
Output
30 pF
R2
255
AC Test Conditions
Input Pulse Levels .................................................. 0 V to 3 V
Input Rise and Fall Times (10% - 90%)........................ <5 ns
Input and Output Timing Reference Levels ................... 1.5 V
Note
4. These parameters are guaranteed by design and are not tested.
Document Number: 001-50593 Rev. *G
Page 8 of 18


STK15C88 equivalent, schematic
Acronyms
Acronym
CE
CMOS
EIA
I/O
nvSRAM
OE
RoHS
SRAM
WE
Description
chip enable
complementary metal oxide semiconductor
electronic industries alliance
input/output
non-volatile static random access memory
output enable
restriction of hazardous substances
static random access memory
write enable
STK15C88
Document Conventions
Units of Measure
Symbol
°C
Hz
kHz
k
MHz
A
F
s
mA
ms
ns
%
pF
V
W
Unit of Measure
degree Celsius
hertz
kilohertz
kilo-ohm
megahertz
microampere
microfarad
microsecond
milliampere
millisecond
nanosecond
ohm
percent
picofarad
volt
watt
Document Number: 001-50593 Rev. *G
Page 16 of 18



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