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PDF ( 数据手册 , 数据表 ) ADV7283

零件编号 ADV7283
描述 4x Oversampled SDTV Video Decoder
制造商 Analog Devices
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ADV7283 数据手册, 描述, 功能
Data Sheet
10-Bit, 4× Oversampled SDTV Video Decoder
with Differential Inputs and Deinterlacer
ADV7283
FEATURES
Worldwide NTSC/PAL/SECAM color demodulation support
One 10-bit analog-to-digital converter (ADC), 4× oversampling
per channel for CVBS, Y/C, and YPrPb modes
6 analog video input channels with on-chip antialiasing
filters
Video input support for CVBS (composite), Y/C (S-Video), and
YPrPb (component)
Fully differential, pseudo differential, and single-ended
CVBS video input support
NTSC/PAL/SECAM autodetection
Up to 4 V common-mode input range solution
Excellent common-mode noise rejection capabilities
5-line adaptive 2D comb filter and CTI video enhancement
Adaptive Digital Line Length Tracking (ADLLT), signal
processing, and enhanced FIFO management provide
time-base correction (TBC) functionality
Integrated automatic gain control (AGC) with adaptive peak
white mode
Fast switching capability
Integrated interlaced-to-progressive (I2P) video output
converter (deinterlacer)
Adaptive contrast enhancement (ACE)
Down dither (8-bit to 6-bit)
Rovi® (Macrovision) copy protection detection
8-bit ITU-R BT.656 YCrCb 4:2:2 output
Full featured vertical blanking interval (VBI) data slicer with
world system teletext (WST) support
Power-down mode available
2-wire, I2C-compatible serial interface
Qualified for automotive applications
−40°C to +105°C automotive temperature grade
−40°C to +85°C industrial qualified temperature grade
32-lead, 5 mm × 5 mm, RoHS-compliant LFCSP
APPLICATIONS
Automotive infotainment
Smartphone/multimedia handsets
DVRs for video security
Media players
GENERAL DESCRIPTION
The ADV7283 is a versatile one-chip, multiformat video
decoder that automatically detects standard analog baseband
video signals compatible with worldwide NTSC, PAL, and
SECAM standards in the form of composite, S-Video, and
component video.
The ADV7283 converts the analog video signals into a YCrCb
4:2:2 video data stream that is compatible with the 8-bit ITU-R
BT.656 interface standard.
The six analog video inputs of the ADV7283 can accept single-
ended, pseudo differential, and fully differential signals.
The ADV7283 contains a deinterlacer (I2P converter) that
allows the device to output video in a progressive format.
The ADV7283 is programmed via a 2-wire, serial bidirectional
port (I2C compatible) and is fabricated in a 1.8 V CMOS
process.
The ADV7283 is provided in a space-saving LFCSP surface-
mount, RoHS-compliant package.
The ADV7283 is available in an automotive grade rated over the
−40°C to +105°C temperature range, as well as a −40°C to +85°C
temperature range, making the device ideal for both automotive
and industrial applications.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility isassumed by Analog Devicesforitsuse, nor for any infringementsof patentsorother
rightsof third partiesthatmayresult fromitsuse. Specificationssubjecttochangewithout notice.No
licenseisgranted by implication or otherwiseunder any patent or patent rightsof Analog Devices.
Trademarks and registered trademarks are the property oftheir respective owners.
One Technology Way , P.O. Box 910 6, Norwood, MA 0206 2-9106 , U.S .A.
Tel: 78 1.32 9.47 00 ©2014–2016 Analog Devices, Inc. All rights reserved.
Technica l Support
www.analog.com







ADV7283 pdf, 数据表
Data Sheet
ADV7283
PIXEL PORT TIMING SPECIFICATIONS
AVDD, DVDD, and PVDD = 1.71 V to 1.89 V, DVDDIO = 1.62 V to 3.63 V, specified at operating temperature range, unless otherwise noted.
Specifications guaranteed by characterization.
Table 5.
Parameter
CLOCK OUTPUTS
LLC Output Frequency
LLC Mark Space Ratio
DATA AND CONTROL OUTPUTS
Data Output Transitional Time
Symbol
t16:t17
t18
t19
Test Conditions/Comments
Min
45:55
Negative clock edge to start of valid data
(tSETUP = t17 − t18)
End of valid data to negative clock edge
(tHOLD = t16 − t19)
Typ
27
Max
55:45
3.8
6.9
Unit
MHz
% duty cycle
ns
ns
OUTPUT LLC
t16 t17
P0 TO P7 OUTPUTS
t18
t19
Figure 3. Pixel Port and Control Output Timing Diagram
Rev. A | Page 7 of 21







ADV7283 equivalent, schematic
Data Sheet
ADV7283
ADAPTIVE CONTRAST ENHANCEMENT
The ADV7283 can increase the contrast of an image depending
on the content of the picture, making bright areas brighter and
dark areas darker. The optional ACE feature increases the
contrast within dark areas without significantly affecting the
bright areas. The ACE feature is particularly useful in
automotive applications, where it is important to discern objects
in shaded areas.
The ACE function is disabled by default. To enable the ACE
function, execute the following register writes:
1. Write 0x40 to Register 0x0E in User Sub Map (0x40 or
0x42). This enters User Sub Map 2.
2. Write 0x80 to Register 0x80 in User Sub Map 2 (0x40 or
0x42). This enables ACE.
3. Write 0x00 to Register 0x0E in User Sub Map 2 (0x40 or
0x42). This reenters User Sub Map.
To disable the ACE function, execute the following register
writes:
1. Write 0x40 to Register 0x0E in User Sub Map (0x40 or
0x42). This enters User Sub Map 2.
2. Write 0x00 to Register 0x80 in User Sub Map 2 (0x40 or
0x42). This disables ACE.
3. Write 0x00 to Register 0x0E in User Sub Map 2 (0x40 or
0x42). This reenters User Sub Map.
I2P FUNCTION
The I2P function of the ADV7283 allows the device to convert
an interlaced video input into a progressive video output. This
function is performed without the need for external memory.
The ADV7283 use edge adaptive technology to minimize video
defects on low angle lines.
The I2P function is disabled by default. To enable the I2P func-
tion, use the recommended scripts from Analog Devices, Inc.
ITU-R BT.656 TRANSMITTER CONFIGURATION
The ADV7283 receives analog video and outputs digital video
according to the ITU-R BT.656 specification. The ADV7283
outputs the ITU-R BT.656 video data stream over the P0 to P7
data pins, and has a line-locked clock (LLC) pin.
Video data is output over the P0 to P7 pins in YCrCb 4:2:2 format.
Synchronization signals are automatically embedded in the video
data signal in accordance with the ITU-R BT.656 specification.
The LLC output clocks the output data on the P0 to P7 pins at a
nominal frequency of 27 MHz.
ANALOG
VIDEO
INPUT
VIDEO
DECODER
ADV7283
ANALOG STANDARD
FRONT DEFINITION
END PROCESSOR
ITU-R BT.656
DATA
STREAM
P0
P1
P2
P3
P4
P5
P6
P7
LLC
Figure 8. ITU-R BT.656 Output Stage
Rev. A | Page 15 of 21










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