DataSheet8.cn


PDF ( 数据手册 , 数据表 ) ADE7816

零件编号 ADE7816
描述 Energy Metering IC
制造商 Analog Devices
LOGO Analog Devices LOGO 


1 Page

No Preview Available !

ADE7816 数据手册, 描述, 功能
Data Sheet
Six Current Channels, One Voltage Channel
Energy Metering IC
ADE7816
FEATURES
Measures active and reactive energy, sampled waveforms,
and current and voltage rms
6 current input channels and 1 voltage channel
<0.1% error in active and reactive energy over a dynamic
range of 1000:1
Supports current transformer and Rogowski coil sensors
Provides instantaneous current and voltage readings
Angle measurements on all 6 channels
2 kHz bandwidth operation
Reference: 1.2 V (drift 10 ppm/°C typical) with external
overdrive capability
Flexible I2C, SPI, and HSDC serial interfaces
GENERAL DESCRIPTION
The ADE7816 is a highly accurate, multichannel metering
device that is capable of measuring one voltage channel and up
to six current channels. It measures line voltage and current and
calculates active and reactive energy, as well as instantaneous rms
voltage and current. The device incorporates seven sigma-delta
(Σ-Δ) ADCs with a high accuracy energy measurement core.
The six current input channels allow multiple loads to be measured
simultaneously. The voltage channel and the six current channels
each have a complete signal path allowing for a full range of
measurements. Each input channel supports a flexible gain stage
and is suitable for use with current transformers (CTs). Six on-
chip digital integrators facilitate the use of the Rogowski coil
sensors.
The ADE7816 provides access to on-chip meter registers via either
the SPI or I2C interface. A dedicated high speed interface, the
high speed data capture (HSDC) port, can be used in conjunction
with I2C to provide access to real-time ADC output information.
A full range of power quality information, such as overcurrent,
overvoltage, peak, and sag detection, is accessible via the two
external interrupt pins, IRQ0 and IRQ1.
The ADE7816 energy metering IC operates from a 3.3 V supply
voltage and is available in a 40-lead LFCSP that is Pb free and
RoHS compliant.
CLKIN 27
CLKOUT 28
VP 15
VN 16
IAP 7
IAN 8
IBP 9
IBN 12
ICP 13
ICN 14
IDP 23
RESET
4
1.2V
REF
PGA2
PGA1
PGA1
PGA1
PGA3
REFIN/OUT
17
FUNCTIONAL BLOCK DIAGRAM
DGND
6
VGAIN
ADC
IAGAIN
PCF_A_COEFF
HPF
DIGITAL
INTEGRATOR
ADC
HPF
ADC
ADC
ADC
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
VRMSOS
X2
LPF
VRMS
AWATTOS AWGAIN
LPF
COMPUTATIONAL
BLOCK FOR
TOTAL
REACTIVE POWER
AVAROS
AVARGAIN
ENERGY
AND RMS
DATA
ALL
CHANNELS
IARMSOS
X2
LPF
IARMS
IEP 22
PGA3
ADC
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
IFP 19
IN 18
PGA3
ADC
ENERGY AND RMS CALCULATIONS SEE
CHANNEL A FOR DETAILED SIGNAL PATH
POR
LDO
LDO
ADE7816
SPI/I2C
I2C
HSDC
26 25
VDD AGND
Figure 1.
24
AVDD
5
DVDD
40 34 33 31
NC NC NC NC
2 PULL_HIGH
3 PULL_LOW
29 IRQ0
32 IRQ1
36 SCLK/SCL
38 MOSI/SDA
37 MISO/HSD
39 SS/HSA
35 HSCLK
1 NC
10 NC
11 NC
20 NC
21 NC
30 NC
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2012–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com







ADE7816 pdf, 数据表
Data Sheet
HSDC Interface Timing
Table 4. HSDC Interface Timing Parameter
Parameter
HSA to HSCLK Edge
HSCLK Period
HSCLK Low Pulse Width
HSCLK High Pulse Width
Data Output Valid After HSCLK Edge
Data Output Fall Time
Data Output Rise Time
HSCLK Rise Time
HSCLK Fall Time
HSD Disable After HSA Rising Edge
HSA High After HSCLK Edge
Symbol
tSS
tSL
tSH
tDAV
tDF
tDR
tSR
tSF
tDIS
tSFS
Min
0
125
50
50
5
0
HSA
tSS
tSFS
HSCLK
tDAV
HSD
tSL
tSH
tSF tSR
tDIS
MSB
INTERMEDIATE BITS
tDF
Figure 4. HSDC Interface Timing
LSB
tDR
Load Circuit for All Timing Specifications
2mA
IOL
TO OUTPUT
PIN CL
50pF
800µA
IOH
1.6V
Figure 5. Load Circuit for All Timing Specifications
ADE7816
Max Unit
ns
ns
ns
ns
40 ns
20 ns
20 ns
10 ns
10 ns
ns
ns
Rev. A | Page 7 of 48







ADE7816 equivalent, schematic
Data Sheet
TERMINOLOGY
Measurement Error
The error associated with the energy measurement made by the
ADE7816 is defined by the following equation:
Measurement Error =
Energy Registered by ADE7816 True Energy ×100%
True Energy
Phase Error Between Channels
The high-pass filter (HPF) and digital integrator introduce
a slight phase mismatch between the current channels and the
voltage channel. The all digital design ensures that the phase
matching between the current channels and voltage channel in
all three phases is within ±0.1° over a range of 45 Hz to 65 Hz
and ±0.2° over a range of 40 Hz to 1 kHz. This internal phase
mismatch can be combined with the external phase error (from
current sensor or component tolerance) and calibrated with the
phase calibration registers.
Power Supply Rejection (PSR)
PSR quantifies the ADE7816 measurement error as a percentage
of reading when the power supplies are varied. For the ac PSR
measurement, a reading at nominal supplies (3.3 V) is taken.
A second reading is obtained with the same input signal levels
ADE7816
when an ac signal (120 mV rms at 100 Hz) is introduced onto the
supplies. Any error introduced by this ac signal is expressed as a
percentage of reading (see the Measurement Error definition).
For the dc PSR measurement, a reading at nominal supplies
(3.3 V) is taken. A second reading is obtained with the same
input signal levels when the power supplies are varied ±10%.
Any error introduced is expressed as a percentage of the reading.
ADC Offset Error
ADC offset error refers to the dc offset that is associated with
the analog inputs to the ADCs. It means that, with the analog
inputs connected to AGND, the ADCs still see a dc analog input
signal. The magnitude of the offset depends on the gain and input
range selection (see the Typical Performance Characteristics
section). However, the HPF removes the offset from the current
channels and voltage channel, and the power calculation remains
unaffected by this offset.
Gain Error
The gain error in the ADCs of the ADE7816 is defined as the
difference between the measured ADC output code (minus the
offset) and the ideal output code. The difference is expressed as
a percentage of the ideal code.
Rev. A | Page 15 of 48










页数 30 页
下载[ ADE7816.PDF 数据手册 ]


分享链接

Link :

推荐数据表

零件编号描述制造商
ADE7816Energy Metering ICAnalog Devices
Analog Devices

零件编号描述制造商
STK15C88256-Kbit (32 K x 8) PowerStore nvSRAMCypress Semiconductor
Cypress Semiconductor
NJM4556DUAL HIGH CURRENT OPERATIONAL AMPLIFIERNew Japan Radio
New Japan Radio
EL1118-G5 PIN LONG CREEPAGE SOP PHOTOTRANSISTOR PHOTOCOUPLEREverlight
Everlight


DataSheet8.cn    |   2020   |  联系我们   |   搜索  |  Simemap