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PDF ( 数据手册 , 数据表 ) AD7292

零件编号 AD7292
描述 10-Bit Monitor and Control System
制造商 Analog Devices
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AD7292 数据手册, 描述, 功能
Data Sheet
10-Bit Monitor and Control System with ADC,
DACs, Temperature Sensor, and GPIOs
AD7292
FEATURES
10-bit SAR ADC
8 multiplexed analog input channels
Single-ended mode of operation
Differential mode of operation
5 V analog input range
VREF, 2 × VREF, or 4 × VREF input ranges
Input measured with respect to AGND or VDD
4 monotonic, 10-bit, 5 V DACs
2 µs settling time
Power-on reset to 0 V
10 mA sink and source capability
Internal temperature sensor
±1°C accuracy
12 general-purpose digital I/O pins
Internal 1.25 V reference
Built-in monitoring features
Minimum and maximum value register for each channel
Programmable alert thresholds
Programmable hysteresis
SPI interface
Temperature range: −40°C to +125°C
Package type: 36-lead LFCSP
APPLICATIONS
Base station power amplifier (PA) monitoring and control
RF control loops
Optical communication system control
General-purpose system monitoring and control
GENERAL DESCRIPTION
The AD7292 contains all the functionality required for general-
purpose monitoring of analog signals and control of external
devices, integrated into a single-chip solution. The AD7292
features an 8-channel, 10-bit SAR ADC, four 10-bit DACs, a
±1°C accurate internal temperature sensor, and 12 GPIOs to
aid system monitoring and control.
The 10-bit, high speed, low power successive approximation
register (SAR) ADC is designed to monitor a variety of single-
ended input signals. Differential operation is also available by
configuring VIN0 and VIN1 to operate as a differential pair.
The AD7292 offers a register programmable ADC sequencer,
which enables the selection of a programmable sequence of
channels for conversion.
FUNCTIONAL BLOCK DIAGRAM
REFOUT
REFIN DVDD AVDD VDRIVE
TEMPERATURE
SENSOR
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
MUX T/H
BUF
1.25V
REF
÷4
BUF
10-BIT
SAR ADC
CONTROL
LOGIC
ALERT AND LIMIT
REGISTERS
AD7292
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
VOUT0
VOUT1
VOUT2
VOUT3
DIGITAL I/Os
SPI
INTERFACE
Figure 1.
Four 10-bit digital-to-analog converters (DACs) provide outputs
from 0 V to 5 V. An internal, high accuracy, 1.25 V reference
provides a separately buffered reference source for both the ADC
and the DACs.
A high accuracy band gap temperature sensor is monitored and
digitized by the 10-bit ADC to give a resolution of 0.03125°C.
The AD7292 also features built-in limit and alarm functions.
The AD7292 is a highly integrated solution offered in a 36-lead
LFCSP package with an operating temperature range of −40°C
to +125°C.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2012–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com







AD7292 pdf, 数据表
Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 6.
Parameter
AVDD to AGND
DVDD to DGND
VDRIVE to DGND
VINx to AGND
VOUTx to AGND
Digital Inputs/Outputs to DGND
CS, SCLK, DIN, DOUT to DGND
REFOUT to AGND
REFIN to AGND
DGND to AGND
Operating Temperature Range
Storage Temperature Range
Junction Temperature (TJ max)
ESD, Human Body Model
Reflow Soldering Peak Temperature
Rating
−0.3 V to +6 V
−0.3 V to +6 V
−0.3 V to +6 V
−0.3 V to AVDD + 0.3 V
−0.3 V to AVDD + 0.3 V
−0.3 V to DVDD + 0.3 V
−0.3 V to VDRIVE + 0.3 V
−0.3 V to +2.2 V
−0.3 V to AVDD + 0.3 V
0.3 V
−40°C to +125°C
−65°C to +150°C
150°C
2.5 kV
260°C
AD7292
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
Table 7. Thermal Resistance
Package Type
θJA
36-Lead LFCSP
54.1
Unit
°C/W
ESD CAUTION
Rev. A | Page 7 of 40







AD7292 equivalent, schematic
Data Sheet
THEORY OF OPERATION
ANALOG INPUTS
The AD7292 has eight analog input channels. By default, these
channels are configured as single-ended inputs. Differential
operation is also available by configuring VIN0 and VIN1 to
operate as a differential pair.
Single-Ended Mode
In applications where the signal source has high impedance, it
is recommended that the analog input be buffered before it is
applied to the ADC.
The analog input range is programmed to one of these values:
0 V to VREF, 0 V to 2 × VREF, or 0 V to 4 × VREF. For information
about programming the input range, see the VIN RANGE0 and
VIN RANGE1 Subregisters (Address 0x10 and Address 0x11)
section.
In 0 V to 2 × VREF mode, the input is scaled by a factor of 2 before
the conversion takes place. In 0 V to 4 × VREF mode, the input
is scaled by a factor of 4 before the conversion takes place. Note
that the voltage with respect to AGND on the ADC analog input
pins cannot exceed AVDD.
If the analog input signal to be sampled is bipolar, the internal
reference of the ADC can be used to externally bias this signal
up so that it is correctly formatted for the ADC. Figure 31 shows
a typical connection diagram when operating the ADC in single-
ended mode with a bipolar ±0.625 V input signal.
+1.25V
R
+0.625V
0V
–0.625V
R
VIN
3R
R
0V
VIN0
AD7292
VIN7 REFOUT
0.47µF
Figure 31. Interfacing to a Bipolar Input Signal
Differential Mode
The AD7292 can be configured to have one differential analog
input pair (VIN0 and VIN1). Differential signals have some
benefits over single-ended signals, including noise immunity
based on the common-mode rejection of the device and improve-
ments in distortion performance. Figure 32 shows the fully
differential analog input of the AD7292.
AD7292
COMMON-MODE
VOLTAGE
VREF p-p
VIN+
VIN0
AD7292
VREF p-p VIN–
VIN1
Figure 32. Differential Analog Input
The amplitude of the differential signal is the difference
between the signals applied to the input pins of the differential
pair, VIN0 and VIN1. The resulting converted data is stored in
straight binary format in the ADC data register. VIN0 and VIN1
should be simultaneously driven by two signals that are 180° out
of phase; each signal should be of maximum amplitude VREF,
2 × VREF, or 4 × VREF, depending on the selected range.
Therefore, if the 0 V to VREF range is selected, the amplitude of
the differential signal is −VREF to +VREF peak-to-peak (2 × VREF),
regardless of the common-mode voltage (VCM).
The common-mode voltage is the average of the two signals.
VCM = (VIN+ + VIN−)/2
The common-mode voltage is, therefore, the voltage on which
the two inputs are centered; the resulting span for each input is
VCM ± VREF/2. This voltage must be set up externally. When the
inputs are driven with an amplifier, the actual common-mode
range is determined by the output voltage swing of the amplifier
and the input common-mode range of the AD7292. The common-
mode voltage must be in this range to guarantee the functionality
of the AD7292 (see Figure 33). When a conversion takes place,
the common-mode voltage is rejected, resulting in a virtually
noise-free signal of amplitude −VREF to +VREF.
69
DIFFERENTIAL MODE
67
AVDD = 5V
DVDD = 3V
VDRIVE = 3V
65
TA = 25°C
fSAMPLE = 225kSPS
INTERNAL REFERENCE
63
61
59 1 × VREF
2 × VREF
4 × VREF
57
55
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
COMMON-MODE VOLTAGE (V)
Figure 33. Common-Mode Voltage (Dependent on Input Range)
Rev. A | Page 15 of 40










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