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PDF ( 数据手册 , 数据表 ) AX2061

零件编号 AX2061
描述 LCD Driver
制造商 ON Semiconductor
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AX2061 数据手册, 描述, 功能
AX2061
LCD Driver for Low
Multiplex Rates
OVERVIEW
The AX2061 is an LCD driver for low multiplex rates. Figure 1
shows the block diagram of the AX2061. The chip is controlled by a
microcontroller using the SPI interface. The microcontroller writes
pixel (segment) data into the pixel data memory. Display updates may
be delayed using the pixel data latches. The pixel data latches drive the
segment drivers, while the row counter drives the row drivers.
Features
Singlechip LCD Controller/Driver 5 Row, 76 Segment Outputs
Wide Power Supply Range: from 2.2 V to 3.6 V
4bit Contrast Register
Selectable Row Drive Configuration: Static or 2/3/4/5 Row
Multiplexing
Internal Generation of LCD Bias Voltages with Charge Pump
from a Single 2.2 to 3.6 V Power Supply
76 × 5bit RAM for Display Data Storage
Autoincremented Display Data Loading
Low Power Consumption
Internal 32 kHz Oscillator
SPIBus Interface
BLOCK DIAGRAM
www.onsemi.com
ORDERING INFORMATION
Device
Package
Shipping
AX20611WD1 Wafer/Die Contact Sales
See additional information on page 16 of this data sheet.
VDD
ICLK
RREF
SYSCLK (32kHz)
optional
LATCH
VSS
SEL
CLK
MOSI
MISO
optional
CAP
Voltage Regulator / Pump
Oscillator
32 kHz
Frequency
Divider
Pixel
Address
Counter
SPI
Row Drivers
Frame
Counter
ROW#
ROW#
SEG#
Segment Drivers
Pixel Latches
Pixel Data Registers
Figure 1. Functional Block Diagram of the AX2061
© Semiconductor Components Industries, LLC, 2016
March, 2016 Rev. 3
1
Publication Order Number:
AX2061/D







AX2061 pdf, 数据表
AX2061
Table 10. DETAILED MAPPING BETWEEN PIXEL
ADDRESSES AND ROWS/SEGMENTS
Pixel Address
0
Coordinate
Row 0, Segment 0
……
75 Row 0, Segment 75
76 n/a
……
127 n/a
128 Row 1, Segment 0
……
203 Row 1, Segment 75
204 n/a
……
255 n/a
256 Row 2, Segment 0
……
331 Row 2, Segment 75
332 n/a
……
383 n/a
384 Row 3, Segment 0
……
459 Row 3, Segment 75
450 n/a
……
511 n/a
512 Row 4, Segment 0
……
587 Row 4, Segment 75
488 n/a
……
639 n/a
Control of LCD Display and Drive Waveform
Setting of Drive Duty
In the AX2061, the drive duty can be set to 1/1 to 1/5 using
the configuration register MODE[3:0].
Table 11. WAVEFORMS
Duty Mode
1/1 1000
FRMCLK
COM0
COM1
COM2
COM3
COM4
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
Waveform
Memory
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
ROW
0
*
*
*
*
*
*
*
www.onsemi.com
8







AX2061 equivalent, schematic
AX2061
DIE OUTLINE, PAD COORDINATES AND WAFER INFORMATION
Table 27.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
XOUT
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
XIN
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
120 & 290
Y
2655
2609
2563
2517
2470
2424
2378
2332
2285
2239
2193
2147
2100
2054
2008
1962
1915
1869
1823
1777
1730
1684
1638
1592
1545
1499
1453
1407
1360
1314
1268
1222
1175
1129
1083
1037
990
944
898
852
805
760
715
670
625
580
535
Symbol
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
COM0
COM1
COM2
COM3
COM4
VDD
VDD
VSS
VSS
VDDCORE
VDDCORE
VSS
Pin
XIN
XOUT
59 956 &1126
60 1206
61 956 &1126
62 1206
63 956 &1126
64 1206
65 956 &1126
66 1206
67 956 &1126
68 1206
69 956 &1126
70 1206
71 956 &1126
72 1206
73 956 &1126
74 1206
75 956 &1126
76 1206
77 956 &1126
78 1206
79 956 &1126
80 1206
81 956 &1126
82 1206
83 956 &1126
84 1206
85 956 &1126
86 1206
87 956 &1126
88 1206
89 956 &1126
90 1206
91 956 &1126
92 1206
93 956 &1126
94 1206
95 956 &1126
96 1206
97 956 &1126
98 1206
99 956 &1126
100 1206
101 956 &1126
102 1206
103 956 &1126
104 1206
105 956 &1126
www.onsemi.com
16
Y
40
85
130
175
220
265
310
355
400
445
490
535
580
625
670
715
760
805
852
898
944
990
1037
1083
1129
1175
1222
1268
1314
1360
1407
1453
1499
1545
1592
1638
1684
1730
1777
1823
1869
1915
1962
2008
2054
2100
2147
Symbol
ICLK
SYSCLK
LATCH
MOSI
MISO
TST
VD1
VD1
VSS
RREF
VSS
VD2
VD2
VSS
VSS
VD3
VD3
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
SEG41
SEG42
SEG43
SEG44
SEG45
SEG46
SEG47
SEG48
SEG49
SEG50
SEG51
SEG52
SEG53
SEG54
SEG55
SEG56
SEG57
SEG58
SEG59
SEG60
SEG61
SEG62
SEG63
SEG64










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