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PDF ( 数据手册 , 数据表 ) DA9210

零件编号 DA9210
描述 Multi-Phase 12 A DC-DC Buck Converter
制造商 Dialog Semiconductor
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DA9210 数据手册, 描述, 功能
DA9210
DA9210 Multi-Phase 12 A DC-DC Buck Converter
General Description
DA9210 is a multi-phase synchronous step-down converter suitable for supplying the CPU power in
smartphones, tablets, UltrabooksTM, and other handheld applications, which require high currents to
run the processor core.
DA9210 is designed to operate with four phases, each phase using a small external 0.47 µH
inductor. The buck is capable of delivering up to 12 A continuous output current with an output
voltage of 0.3 V to 1.57 V. The input voltage range of 2.8 V to 5.5 V makes it suited for a wide variety
of low voltage systems, including all Li-Ion battery supplied applications. Two DA9210s can be used
in parallel to deliver an output current of up to 24 A.
The DA9210 point-of-load remote-sensing feature guarantees the highest accuracy while supporting
multiple PCB routing scenarios without loss of performance. The highly-integrated design removes
the need for external switching FETs or Schottky diodes.
A programmable soft start-up can be enabled, which limits the inrush current from the input node and
ensures a slope controlled activation of the rail.
The Dynamic Voltage Control (DVC) supports adaptive adjustment of the supply voltage dependent
on the processor load. This is done via direct register write through the communication interface (I2C
or SPI compatible), via the dedicated DVC control interface, or via a programmable input pin.
DA9210 integrates over-temperature and over-current protection for increased system reliability,
without the need for external sensing components. A Power Good and Over-Current Alarm output
informs the CPU of an out range voltage output and if the current exceeds a programmable limit,
thereby enabling the processor to reduce its consumption before the supply rail collapses.
Key Features
2.8 V to 5.5 V input voltage
Interfaces:
0.3 V to 1.57 V output voltage
I2C and SPI
12 A output current
Dedicated DVC
24 A output current in parallel configuration
GPIO
3 MHz nominal switching frequency
Adjustable soft-start
Enables use of low-profile inductors
-40 ºC to +125 ºC junction temperature
Output voltage accuracy ±2.5 %
operation
Dynamic Voltage Control (DVC)
Regulator supervision with automatic under-
Automatic phase shedding
Integrated power switches
Remote sensing at point-of-load
voltage and over-voltage protection
AEC Q100 grade 3 automotive option
Package 48 WLCSP (Route EasyTM,
equivalent to 0.8 mm pitch)
Power Good and Over-Current Alarm signal Package 42 VFBGA 0.8 mm pitch
(automotive)
Applications
High performance multi-core system-on-chip Tablet PCs
(SoC) applications
In-car infotainment/dashboard
Smartphones
Portable navigation devices
Mobile phones
UltrabooksTM
TV and media players
Embedded industrial systems
Datasheet
CFR0011-120-00
Revision 2.0
1 of 90
09-Sep-2016
© 2016 Dialog Semiconductor







DA9210 pdf, 数据表
DA9210
DA9210 Multi-Phase 12 A DC-DC Buck Converter
Pin No.
D2
F2
Pin Nam e
VSS_SENSE
VDDCORE
Alte r nate
Function
F12 GPIO0
D12
VERROR
GPIO1
E13
IPHASE
GPIO2
G1
BUCK_CLK
GPIO3
B8
AC_OK
GPIO4
H8
nCS/SYNC
GPIO5
J7
SO/INPUT
GPIO6
B6
A7
C7
E3, E11
SI
SK
TP
NC
DATA
CLK
H6 VSYS
G7
C3, C5, G3, G5,
C9, C11, G9, G11
VSS_QUIET
VSS_NOISY
Table 2: Pin Type Definition
Pin type
De s cr iption
DI Digital Input
DO Digital Output
DIO Digital Input/Output
DIOD
Digital Input/Output Open Drain
PU Fixed Pull-Up resistor
PD Fixed Pull-Dow n resistor
Type
AI
AO
AI/DIO
AIO/DIO
AIO/DIO
DIO
DIO
DIO
DIO
DIO
DI
DIO
VSS
PS
VSS
VSS
De s cr iption
Ground sense node for the buck
Regulated supply for internal
circuitry 2.5 V (decouple w ith
220 nF)
General purpose I/O
Error amplifier voltage signal for
dual parallel mode, general
purpose I/O
Current distribution signal for
dual parallel mode, general
purpose I/O
Buck clock input/output
(depending on slave/master
function in dual parallel mode),
general purpose I/O
Input from safe charger out to
OC_PG signalling, general
purpose I/O, input of external 6
MHz clock
4-WIRE chip select, DVC
Interface input clock, general
purpose I/O
4-WIRE data output, DVC
interface input data, general
purpose I/O
4-WIRE data input, 2-WIRE data
4-WIRE/2-WIRE Clock
Test pin connect to VSS
Electrically not connected
Connect to VSS
Supply for IC and input for
voltage supervision
Pin type
AI
AO
AIO
BP
SPU
SPD
De s cr iption
Analog Input
Analog Output
Analog Input/Output
Backdrive Protection
Sw itchable Pull-Up resistor
Sw itchable Pull-dow n resistor
Datasheet
CFR0011-120-00
Revision 2.0
8 of 90
09-Sep-2016
© 2016 Dialog Semiconductor







DA9210 equivalent, schematic
DA9210
DA9210 Multi-Phase 12 A DC-DC Buck Converter
Param eter
ILIM
IALARM
IQON
IMIN_PFM
f
tON
De s cr iption
Current limit
per phase
(programmable)
Note 5
Current alarm
threshold
(programmable)
Quiescent current
in synchronous
rectification mode
Minimum output
current in PFM
mode
Sw itching
f requenc y
Minimum on time
Turn-on time
Conditions
BUCK_ILIM = 0010
BUCK_ILIM = 1111
BUCK_IALARM = 0
and BUCK_ILIM ≥ 1010
BUCK_IALARM = 1
and BUCK_ILIM ≥ 1010
4-phase operation
No load
VDD = 3.7 V
Static output voltage, No DVC
Note 7
STARTUP_CTRL = 011
M in
-20 %
-20 %
ILIM -
600
ILIM -
1000
Typ
2000
Note 6
4600
ILIM
300
ILIM
600
Max Unit
20
%
mA
20
%
mA
ILIM
- mA
100
ILIM
- mA
300
60 mA
2 mA
2.79
3 3.21 MHz
20 ns
50
µs
Note 1
Note 2
Note 3
Note 4
Note 5
Note 6
Note 7
Output pull-dow n
resistor
Can be sw itched off via
BUCK_PD_ D IS
150 200
Programmable in 10 mV increments
Additional to the DC accuracy. The value is intended measured directly at COUT. In case of remote
sensing, parasitics of PCB and external components may affect this value.
10 mΩ equivalent to a 5 inch (ca 13 cm) copper trace (= 1.7x10-8 Ω/m), w idth 6 mm, thickness
35 µm
10 nH equivalent to a 5 inch (ca 13 cm) trace routed over a ground plane (approx. 1.2 nH/cm)
Peak current on the inductor
Minimum value of the accuracy is ±400 mA under all conditions
For DVC, see Application Note AN-PM-052
6.2 2-WIRE Control Bus
SDA
SCL
START
tF
VIH
VIL
tF
VIH
VIL
tH_STA
tR
tSU_D
1/fSCL
Datasheet
CFR0011-120-00
ACK
STOP
tH_D
tHIGH
tVD_D
tVD_ACK
tSU_STO
tLOW
Figure 4: 2-WIRE Interface Timing
Revision 2.0
16 of 90
09-Sep-2016
© 2016 Dialog Semiconductor










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