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PDF ( 数据手册 , 数据表 ) MCP19116

零件编号 MCP19116
描述 Digitally Enhanced Power Analog Synchronous Low-Side PWM Controller
制造商 Microchip
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MCP19116 数据手册, 描述, 功能
MCP19116/7
Digitally Enhanced Power Analog Synchronous Low-Side PWM Controller
with Improved 8k Word Core
Features
• Input Voltage: +4.5V to +42V
• Can be configured with multiple topologies includ-
ing but not limited to:
- Flyback
- Ćuk
- Boost
- SEPIC (Single-Ended Primary-Inductor
Converter)
• Capable of Quasi-Resonant or Fixed-Frequency
Operation
• Low Quiescent Current: 5 mA Typical
• Low Sleep Current: 50 µA Typical
• Low-Side Gate Drivers:
- +5V gate drive with 0.5A sink/source current
- +10V gate drive with 1A sink/source current
• Peak Current Mode Control
• Differential Remote Output Sense
• Multiple Output Systems:
- Master or Slave
• AEC-Q100 Qualified
• Configurable Parameters:
- VREF, Precision IOUT/VOUT Set Point (DAC)
- ADC Reference Switch (VDD or AVDD)
- Input Undervoltage Lockout (UVLO)
- Input Overvoltage Lockout (OVLO)
- Detection and protection
- Primary current leading edge blanking (0 ns,
50 ns, 100 ns and 200 ns)
- Gate drive dead time (16 ns to 256 ns)
- Fixed switching frequency range:
31.25 kHz to 2.0 MHz
- Slope compensation
- Quasi-Resonant configuration with built-in
comparator and programmable offset voltage
adjustment
- Primary current offset adjustment
- GPIO pin options
• Integrated Low-Side Differential Current-Sense
Amplifier
• Better than 5% Current Regulation
• Thermal Shutdown
Microcontroller Features
• Precision 8 MHz Internal Oscillator Block:
- Factory-calibrated to ±1%, typical
• Interrupt-Capable:
- Firmware
- Interrupt-on-change pins
• Only 35 Instructions to Learn
• 8192 Words On-Chip Program Memory
• High-Endurance Flash:
- 100,000 write Flash endurance
- Flash retention: > 40 years
• Watchdog Timer (WDT) with Independent
Oscillator for Reliable Operation
• Programmable Code Protection
• In-Circuit Serial Programming™ (ICSP™) via Two
Pins
• Eight I/O Pins and One Input-Only Pin:
- Two open-drain pins
• Analog-to-Digital Converter (ADC):
- 10-bit resolution
- Five external channels
• Timer0: 8-bit Timer/Counter with 8-bit Prescaler
• Enhanced Timer1:
- 16-bit timer with prescaler
- Two selectable clock sources
• Timer2: 8-Bit Timer with Prescaler:
- 8-bit period register
• I2C Communication:
- 7-bit address masking
- Two dedicated address registers
• Addressable Universal Synchronous Receiver
Transmitter (AUSART) Modes
- Asynchronous (Full Duplex)
- Synchronous - Master (Half Duplex)
- Synchronous - Slave (Half Duplex)
2015-2016 Microchip Technology Inc.
DS20005479B-page 1







MCP19116 pdf, 数据表
MCP19116/7
NOTES:
DS20005479B-page 8
2015-2016 Microchip Technology Inc.







MCP19116 equivalent, schematic
MCP19116/7
2.1.8 GPB0 PIN
GPB0 is a true open-drain general purpose pin whose
data direction is controlled in TRISGPB. There is no
internal connection between this pin and device VDD.
This pin does not have a weak pull-up, but
interrupt-on-change is available. When the
MCP19116/7 are configured for I2C communication,
GPB0 functions as the I2C clock (SDA). This pin must
be configured as an input to allow proper operation. For
more information, refer to Section 29.2 “I2C Mode
Overview”.
2.1.9 GPB1 PIN
GPB1 is a general purpose TTL input or CMOS output
pin whose data direction is controlled in TRISGPB. An
internal weak pull-up and interrupt-on-change are also
available.
AN4 is an input to the A/D. To configure this pin to be
read by the A/D on channel 4, bits TRISB1 and ANSB1
must be set.
MCP19116 Only: TX is the USART Asynchronous
serial transmit.
MCP19116 Only: CK is the USART Synchronous serial
clock.
When the MCP19116/7 are configured as a master, this
pin is configured to be the VREF2 DAC output.
2.1.10 GPB4 PIN (MCP19117 ONLY)
GPB4 is a general purpose TTL input or CMOS output
pin whose data direction is controlled in TRISGPB. An
internal weak pull-up and interrupt-on-change are also
available.
AN5 is an input to the A/D. To configure this pin to be
read by the A/D on channel 5, bits TRISB4 and ANSB4
must be set.
ICSPDAT is the primary serial-programming data I/O
function. This is used in conjunction with ICSPCLK to
serial program the device.
2.1.11 GPB5 PIN (MCP19117 ONLY)
GPB5 is a general purpose TTL input or CMOS output
pin whose data direction is controlled in TRISGPB. An
internal weak pull-up and interrupt-on-change are also
available.
AN6 is an input to the A/D. To configure this pin to be
read by the A/D on channel 6, bits TRISB5 and ANSB5
must be set.
ICSPCLK is the primary serial-programming clock
function. This is used in conjunction with ICSPDAT to
serial program the device.
2.1.12 GPB6 PIN (MCP19117 ONLY)
GPB6 is a general purpose TTL input or CMOS output
pin whose data direction is controlled in TRISGPB. An
internal weak pull-up and interrupt-on-change are also
available.
AN7 is an input to the A/D. To configure this pin to be
read by the A/D on channel 7, bits TRISB6 and ANSB6
must be set.
MCP19117 Only: TX is the USART Asynchronous
serial transmit.
MCP19117 Only: CK is the USART Synchronous serial
clock.
2.1.13 GPB7 PIN (MCP19117 ONLY)
GPB7 is a general purpose TTL input or CMOS output
pin whose data direction is controlled in TRISGPB. An
internal weak pull-up and interrupt-on-change are also
available.
RX is the USART Asynchronous serial receive.
DT is the USART Synchronous serial clock.
For more information, refer to Section 10.0 “Address-
able USART Module”
GPB7 is the CCD2 output Compare. For more informa-
tion, refer to Section 27.0 “Dual Capture/Compare
(CCD) Module”.
2.1.14 DESATN PIN
Internal comparator inverting input. Used during
Quasi-Resonant operation for desaturation detection.
2.1.15 DESATP/ISOUT PIN
When using the internal comparator for desaturation
detection during Quasi-Resonant operation, this pin
connects to the comparator’s non-inverting input. The
output of the remote sense current-sense amplifier gets
configured to utilize the 5 kinternal feedback resistor.
When not utilizing the internal comparator and not
configured to use the 5 kinternal feedback resistor,
the current sense amplifier gets connected to this pin
and is ISOUT.
2.1.16 ISP PIN
The non-inverting input to internal current-sense
amplifier, typically used to differentially remote-sense
secondary current. This pin can be internally pulled-up
to VDD by setting the <ISPUEN> bit in the PE1 register.
2.1.17 ISN PIN
The inverting input to internal current-sense amplifier,
typically used to differentially remote-sense secondary
current.
DS20005479B-page 16
2015-2016 Microchip Technology Inc.










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